Precise Measurement and Comparison of Radiation Sensitivity of Modern Semiconductor Memories
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This article describes some of the test methods that need to be considered to accurately measure the radiation sensitivity of modern high-security, high-speed semiconductor memories in time to prevent cosmic ray damage to critical automotive electronic systems . For obvious safety reasons, the car drive-by-wire technology places higher and higher demands on the reliability of the automotive electronic system. At the same time, the ever-lowering cost requires the use of the latest commercial semiconductor components in the automotive electronic subsystem. Semiconductor memory is and will continue to be a basic device for automotive electronic subsystems. As the requirements and intelligence of automotive electronics increase in the next few years, semiconductor memory will inevitably increase in quantity, density, speed and complexity. One aspect of semiconductor memory reliability that has been thoroughly studied is its sensitivity to radiation. In early semiconductor memory, radioactive contamination found in the packaging materials emitted alpha particles, which was eventually discovered to be the root cause of severe system failures in early computers. Fortunately, this problem had been identified and largely solved long before microelectronics became widely used in automobiles. However, a 1994 IBM study found that the soft error rate (SER) of the ground level in the memory due to the neutron flux caused by cosmic rays is very large, and the SER increases sharply in higher latitudes such as Denver, USA. From this data, it can be concluded that cosmic ray-induced semiconductor memory failure is no longer a "space problem". This failure mechanism must be considered in automotive electronic system design. Reliability engineers must accurately estimate the sensitivity to radiation of commercial memory devices they use in their designs. Therefore, test capabilities are required to accurately measure the radiation sensitivity of modern memory devices. Test Tasks The following figure shows a block diagram of the classic synchronous dynamic RAM (SDRAM) memory architecture, whose functions include: — A digital phase-locked loop (DLL) operating at rated speed in synchronization with the internal memory; - Multiple modules for interleaving data for continuous transmission without intervals; —Delay circuits to control internal pipeline operation; — Logic to generate burst serial or interleaved addresses from a single external start address; - word line and bit line encoders that select cells in the array; —Refresh circuit - a sense amplifier to detect the data state during a read cycle; Any test procedure must account for the proper operation of each of these functions to accurately estimate the radiation sensitivity of the memory. A 1991 study showed that radiation-induced failure rates increase dramatically as device speeds increase, largely due to the sense amplifier's increased vulnerability with increasing frequency. During active sensing, the differential voltage measured by the sense amplifier is small and susceptible to radiation-induced single event upsets (SEUs). As clock rates increase, the percentage of time that the sense amplifier is susceptible to single event effects increases. In addition, as the size of the memory cell and the operating voltage decrease, the sense amplifier is more susceptible to radiation-induced errors. Therefore, it is important to test the memory to obtain accurate soft error rate (SER) measurements while the memory is running at the highest possible data rate and operating at full specification. Multi-stage work Modern memories are designed with multiple segments, allowing interleaving of data words for high-speed operation. The measured SER is significantly affected by the number of sense amplifiers activated; that is, by the number of memory segments operating simultaneously. Therefore, the interleaving schemes of different segments must be utilized and controlled to quantify their impact on the SER measurement. The figure above shows an example of a memory pattern sequence that activates all four memory segments, using burst and reaction times to generate a continuous stream of data to be output in a "gapless" operation. This mode of operation is favored for certain computing operations because of the benefits of high-speed data transfer. However, this mode is also more susceptible to radiation-induced errors because it activates all segments at the same time, and therefore has more sense amplifiers operating simultaneously in their most sensitive state. Testing on top of how fast the DLL "stays locked" To minimize memory and system vulnerability to radiation attacks, engineers must analyze the radiation sensitivity of the memory under various interleaving, bursting, and activation schemes and design the surrounding system operations accordingly. Modern memories use digital phase-locked loops (DLLs) to synchronize the operation of various internal circuits to achieve high-speed data transmission. DLLs cannot maintain synchronization at a certain frequency. The minimum "keep locked" frequency of modern synchronous memories is trending upwards. It is not uncommon to see minimum DLL frequency specifications exceeding 100MHz. Below this minimum frequency, the memory operates in a different mode that does not reflect the operation of the memory in a real system. Some studies have measured the radiated sensitivity of memories at 10MHz data rates, which is much lower than the frequency at which the memory DLL "stays locked." For this reason, those measurements do not reflect the radiated sensitivity of actual memory operation. Accurate radiated sensitivity measurements require that the memory be tested while operating at the highest possible data rate (at least higher than the minimum DLL operating speed). Capture full device bitmap Full array bitmaps are essential for studying radiation sensitivity of memories. Bitmap errors are the primary tool for identifying array location fault relationships and using this information to optimize memory and system designs to reduce radiation sensitivity. For example, the bitmap can answer questions like: If two memories have different layout sensitivities, do they have different radiation sensitivities? Are the most sensitive bits at the edge of the subarray or near the center of the subarray? Are there any internal devices that are sensitive to power distribution? Full array bitmap arrangement and storage must be near real-time to continuously monitor the effects of single events over time and allow testing of memory refresh dependencies. The memory "scrambles" the location where data is stored and "senses" the data written to the device array, allowing for a more dense layout of data. Two adjacent external addresses frequently actually read and write data from different physical locations in the memory array. Adjacent bits in an array often have different "senses." One bit represents a "1" as the cell's charged state; the next bit represents a "1" as the cell's uncharged state. This is called bit folding. The radiation sensitivity of a charged cell is higher than that of an uncharged cell because the induced ionizing radiation tends to discharge the cell. Therefore, if engineers write all "1s" to the array, the radiation sensitivity of the array will be underestimated; the same is true if they write all "0s". To accurately measure and compare the radiation sensitivity of memories, the test system must account for the “perturbation” method of each device. Traditionally, topological perturbation information is not readily available from commercial memory manufacturers. Therefore, during radiation sensitivity testing, automotive electronics reliability engineers must ensure that topological perturbations are accounted for to establish confidence in accurately measuring radiation sensitivity. As memory manufacturers face increasing rates of radiation-induced failures in mission-critical and safety-critical applications (and even in general-purpose consumer applications), they are increasingly willing to collaborate in this area. Test requirements for soft error functional interrupt (SEFI) Memory devices exposed to radiation do more than just lose data. Sometimes, the memory can stop functioning if sensitive areas of the memory's complex control circuitry (refresh, segment control, burst, mode control, etc.) are hit by radiation. These events are called soft error function interrupts (SEFIs). SEFI test challenges include all of the above SEU test requirements, as well as the following unique requirements: —To quickly identify intermittent SEFI events and divert them to test routines; —To quickly identify the root cause of SEFI; —To quickly identify the best SEFI recovery procedure; All of these requirements can be met if the test data rate and bitmap capture are fast enough. Challenges of Non-Volatile Memory Radiation Sensitivity Testing Non-volatile memory (NVM) presents unique testing challenges for researchers analyzing radiation sensitivity. Modern NVM devices have high-speed, synchronous control circuits and I/O operations, presenting the same challenges as the high-speed SDRAM described above, except that testing of NVM devices relies on measuring the analog voltage threshold (Vth) of each cell in the memory array. The figure below shows the typical effect of Vth on a flash device. Measuring the voltage thresholds of 16Gb (and above) NVM devices takes a long time. The distribution of voltage thresholds changes with radiation exposure time. Measuring the actual Vth distribution of all cells requires very high-speed voltage measurements on multiple pins. Dedicated voltage threshold measurement circuits and methods can reduce Vth measurement time from days to minutes. Real-time bitmap capture allows the time history of radiation-induced errors to be measured in high-volume NVM devices. Conclusion Modern memories exhibit significant and increasing sensitivity to radiation-induced errors. Accurate measurement and comparison of the radiation sensitivity of modern semiconductor memories requires control of test conditions commensurate with the complexity of the devices. Required testing capabilities include: - high data rate (at least higher than the frequency at which the DLL "keeps locked"); —Complex timing control; —Support burst, reaction time and interleaving; —Support topology disturbance; Without such test system capabilities, measurements of single-shot timing violations , multi-bit violations , single-shot functional disruptions , and soft error rates are generally inaccurate and inconsistent.
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