Design of automobile anti-lock braking system based on MC9S12DP256B

frozenviolet

Design of automobile anti-lock braking system based on MC9S12DP256B [Copy link]

Preface

With the increase of vehicle speed and road traffic density, the requirements for vehicle driving safety performance are becoming higher and higher. The anti-lock braking system (ABS) of automobiles came into being. It is a mechatronic system based on the traditional braking system and adopts electronic control technology to prevent the wheels from locking during braking.

Anti-lock braking system based on dual CPU structure

The following issues are mainly considered in the design of ABS system: First, since the ABS system is directly related to the safety performance of the vehicle, its failure problem is extremely important. The system must ensure that it can detect faults in time and accurately determine the fault points; second, the ABS system usually contains inductive loads such as solenoid valves, and the driving current is large, which requires an appropriate driving circuit; in addition, in order to facilitate the communication between the ABS system and other systems on the vehicle, the system needs to reserve a communication interface.

Based on the original four-sensor four-channel (4S/4M) ABS electronic control unit, this paper develops a pneumatic ABS with applause self-checking. The design adopts the dual CPU structure of MCU+CPLD, and the system structure is shown in Figure 1 (Figure omitted, please refer to "Electronic Design Application" 2005.8).

The control CPU collects wheel speed signals, and then performs road recognition and brake control according to the set deceleration and slip rate threshold values. In addition, it is also responsible for static detection of wheel speed sensors. The safety CPU (CPLD) is mainly responsible for fault detection of the ABS system, determining the fault location, and transmitting the corresponding fault code to the control CPU. After a fault occurs, the control CPU will uniformly handle the fault status, including interrupting the ABS function, restoring to normal braking, lighting the fault display light, and storing the corresponding fault code in the EEPROM. When necessary, it can be randomly transmitted to the host computer or other electronic control systems on the vehicle through the CAN communication port.

System hardware design

ABS system failures mainly include solenoid valve failure, wheel speed signal acquisition system failure, brake line pressure signal acquisition system failure, power supply failure and controller failure. This system provides corresponding diagnostic circuits for these failures.

MC9S12DP256B and CPLD Overview

MC9S12DP256B is a high-speed, high-performance 5.0V FLASH microcontroller based on 16-bit HCS12 CPU and 0.25um manufacturing process. The microcontroller uses phase-locked loop technology or internal frequency multiplication technology to make the internal bus speed much higher than the frequency of the clock generator. The clock frequency used at the same speed is much lower than that of similar microcontrollers, so it has low high-frequency noise and strong anti-interference ability, which is more suitable for the harsh environment inside the car. It also includes multiple modules such as timer, A/D conversion, PWM output, CAN communication, EEPROM, SPI, SCI, etc., with rich resources to meet the development requirements of system functions.

The CPLD in the system uses XC9572TQ100, which supports the extended industrial temperature range. Not only does it have a wider operating temperature range, from -40C to +100C, but it also meets the quality certification standards unique to the automotive industry. In addition, the number of gates and I/Os of the chip meet the design requirements, and there is room for functional expansion.

Digital input channel diagnostic circuit

Whether the wheel speed input signal is correct or not directly affects the operation of the ABS system. For this reason, a digital switch is specially added before the signal processing circuit to facilitate the system to detect the digital input channel of the circuit board. Using the input simulation method, the safety CPU (CPLD) sends a set of standard square wave signals to the digital channel and inputs them to the input capture port of the control CPU for measurement. The specific circuit is shown in Figure 2 (Figure omitted, please refer to "Electronic Design Applications" 2005.8).

CPLD generates DETECT signal to control the on and off of digital switch CD4066. When ABS is powered on and self-tested, DETECT is "0", the switch is open, and the wheel speed signal is shielded. At this time, CPLD generates a pre-defined standard square wave (frequency is 100Hz, that is, 10 pulses per counting cycle (0.1s)) and outputs it to the main CPU. The main CPU captures the square wave through the ECT port for measurement and calculation. After comparing it with the frequency of the defined standard wave, if the result is consistent, it means that the digital input channel is normal, otherwise it means that a fault has occurred. After the detection is completed and everything is normal, DETECT becomes "1", the switch is turned on, and the wheel speed signal passes through the signal shaping and amplification unit and is output by CPLD to the control CPU .

Solenoid valve drive and fault detection circuit

The working current of the solenoid valve in the automobile braking system is 1.5-2.5A, but the output current of the microcontroller is far from meeting this requirement. Therefore, Freescale's high-end driver chip MC33289 is used to drive the solenoid valve. The single-channel control circuit is shown in Figure 3 (Figure omitted, please refer to "Electronic Design Applications" 2005.8).

Due to the self-checking function of MC33289, the St pin can be directly connected to the CPU when applied. Once the solenoid valve fails, such as short circuit or open circuit, St will automatically be set low. After receiving the signal, the CPU will immediately stop the ABS function, light up the fault indicator light, and transmit the corresponding fault code to the control CPU in the form of an interrupt. The detection of the solenoid valve drive status is completed by comparing the output OUT of MC33289 with the input IN. Under normal circumstances, the two logical values of the same path should be equal, and both "1" or "0"; if they are not equal, it means that the driver chip has a fault, and the CPU must interrupt the ABS function, light up the fault indicator light and transmit the fault code.

Fault code storage and transmission

MC9S12DP256B comes with 4KB EEPROM, with addresses from 0x400 to 0xFFF. It does not require external EEPROM and can be used to store fault codes, facilitating long-term data storage.

Before erase and write operations, the module clock must be configured between 150KHz and 200KHz by setting the EEPROM clock distribution register ECLKDIV. The crystal oscillator in the system is 16MHz, the bus frequency is 8MHz, and after calculation, ECLKDIV=0x4A, that is, the pre-division factor PRDIV8=1, the division factor EDIV[5:0]=001010, and the module clock is 182KHz.

Because each write operation is performed in words, for safety reasons, two words are erased each time when erasing. The timing of the erase operation is exactly the same as the write operation, except that the data written to the corresponding address is "0".

In addition, the system combines its own CAN module, selects Philips' PCA82C250, and sets up a CAN interface circuit to facilitate the transmission of fault codes. The interface circuit is shown in Figure 4 (Figure omitted, please refer to "Electronic Design Applications" 2005.8).

Due to space limitations, other circuits in the system, such as wheel speed signal processing circuit, sensor static detection circuit, power supply monitoring circuit, etc., will not be introduced in detail here.

System software and VHDL language design

The system's control CPU MC9S12DP256B is developed in C and assembly languages, while the CPLD is programmed in VHDL.

The functions of the MC9S12DP256B program are: self-test of program memory and data memory; static and dynamic detection of wheel speed sensor; collecting wheel speed signal, calculating wheel speed and deceleration, and outputting brake pressure adjustment signal according to control logic; real-time storage of fault codes; CAN communication.

The functions of the CPLD program are: controlling the on and off of the digital switch CD4066; detecting the digital input channel; monitoring the working status of the solenoid valve driver chip and the solenoid valve; and transmitting fault conditions to the control CPU. The design of CPLD consists of four steps: design input, implementation, verification and chip programming. The design uses VHDL language text input, which is downloaded to the Xilinx chip through parallel cables after synthesis, simulation and implementation. Figures 5 and 6 (Figures omitted, please refer to "Electronic Design Applications" 2005.8) are the flow charts of the system control CPU and CPLD respectively.

Conclusion

This system, with its unique dual CPU structure, integrates anti-lock braking and system fault detection, and can also transmit fault detection codes. At the same time, both CPUs have reserved certain input/output ports, which makes it possible to further expand the functions of automotive electronic control devices.

xiumuzhai

The dual CPU structure is good, but the ABS doesn't always work.

lianxinyu

Still very good

lianxinyu

Both CPUs have reserved certain input/output ports to expand the functions of automotive electronic control devices

lawsherman

ABS+EBD ABS is the abbreviation of Anti-Lock Brake System, which means "anti-lock braking system". In the absence of ABS, emergency braking will cause the tires to lock, the braking distance will be longer, and it is easy to run off the track or drift. ABS controls the wheel lock by controlling the release and retraction of the brake oil pressure, so that the vehicle is always in a critical locking gap rolling state. The full name of EBD in English is Electric Brake force Distribution, which is literally translated into "electronic brake force distribution" in Chinese. When the car brakes, if the conditions of the four tires adhering to the ground are different, it is easy to slip, tilt and roll over. The function of EBD is to calculate the friction value of the four tires due to different adhesion at high speed at the moment of braking, and then adjust the braking device to match the braking force with the friction (traction) to ensure the stability and safety of the vehicle. When the emergency brake wheel locks, EBD has balanced the effective ground grip of each wheel before ABS acts, which can prevent drifting and lateral movement and shorten the braking distance of the car. EBD is actually an auxiliary function of ABS, which can improve the effectiveness of ABS. Therefore, in terms of safety indicators, the car’s performance has been further enhanced with “ABS+EBD”.

frozenviolet

Thanks for the explanation, I have posted this before.

amethyst

Tire precautions: 1. Always check the spare tire to see if it is leaking, and rotate the tire frequently. 2. For the convenience of storage, the width of the spare tire of some cars is 30% to 40% narrower than that of normal tires. These spare tires can only solve the temporary need of a flat tire, and a normal width tire must be replaced as soon as possible afterwards. 3. The body of a four-wheel drive off-road vehicle is relatively high, and some car owners even further increase the shock absorbers. Therefore, the jack may not be high enough to support the body, so the jack must be placed on the horizontal axis. 4. For cars with larger front axle brake discs, the original spare tire cannot match the brake disc nuts. If the front tire is flat, the rear tire can be replaced on the front axle, and the spare tire can be replaced on the rear axle.

qmd01

Very good and powerful. I like it. Do you have a hardware picture?