Application of FIR algorithm implemented by FPGA in automobile dynamic weighing instrument

frozenviolet

Application of FIR algorithm implemented by FPGA in automobile dynamic weighing instrument [Copy link]

Abstract: This paper introduces the FIR algorithm implemented by FPGA, and analyzes the results of applying this algorithm to the dynamic weighing instrument of automobiles. Practice has proved that this algorithm has a good effect in dynamic weighing.
Introduction
When a vehicle is dynamically weighed, the force acting on the platform is not only the real axle weight, but also interference forces generated by many factors, such as vehicle speed, vehicle resonance, road excitation, tire driving force, etc., which makes it very difficult to achieve high-precision measurement of dynamic weighing. If analog filtering is used in the process of eliminating interference, the parameters cannot be too large, otherwise it will cause too much delay and fail to achieve real-time processing, resulting in the filtered signal still containing a considerable amount of noise. Therefore, digital filtering must be used to eliminate interference.

Principle and implementation of FIR filtering
This paper adopts FIR digital filtering, and its principle is shown in formula 1.
Y(n)= (1)
Where h(k) is the system filtering parameter, x(n) is the collected signal, and Y(n) is the output signal after filtering.
FIR filter h(n)0≤n≤N-1
H(z)= (2)
In this paper, N=17. Since h(n) has a symmetric property, that is:
h(n)=h(N-1-n) (n=0,1,...,(N-1)/2) (3)
In this way, the FIR filter can be designed to have a linear phase. Using this situation, the multiplication structure that can be obtained requires (N+1)/2 multiplications, which is only half of the number required for the cascade or parallel structure. Therefore, this method is often used in practical applications.
We use a 17-point FIR filtering algorithm, so that a FIR convolution operation requires 9 multiplications and 16 additions. In order to achieve real-time data processing, the convolution operation needs to be completed within 20ms. If the single-chip microcomputer 89C51 (12M crystal oscillator) is selected, it cannot be achieved. Therefore, we chose Altera's FLEX10K20. The FLEX10K series is the first embedded PLD in the industry. It uses a repetitively configurable CMOS SRAM process, combines continuous fast channel interconnection with a unique embedded array structure, and also combines the advantages of many programmable devices to complete the macro functions of ordinary gate arrays. It has the characteristics of high density, low cost, and low power.

Figure 1 Hardware structure diagram

Figure 2

Figure 3

Figure 4

Hardware Design
Since the conversion time of the AD1674 chip we selected is 10ms, and the designed circuit starts the conversion every 20ms, there is enough time to complete the analog-to-digital conversion. The width of the axle weight table is 40cm, and the maximum speed of the car passing through the axle weight table is 15km/h. By calculation, it can be known that the system can collect 4800 data during this period. Since the first 30ms is the response time of the sensor, the noise will be effectively suppressed after the remaining data is FIR digitally filtered. In order to further smooth the waveform, average every 8 data, so as to weaken the spike signal caused by the bump when the car passes the axle weight table at high speed. Each filtering of the FPGA includes FIR operation and the average operation of 8 data. After completing a filtering, an interrupt request will be sent to the microcontroller, and the microcontroller will read the filtered data. Since the A/D converter we selected is 12 bits, and the microcontroller 89C51 is 8 bits, the processed data must be read in twice. The first read is the lower 8 bits, and the second read is the upper 4 bits, and then the data is processed. At this point, we can assume that the data received by the microcontroller is noise-free data after filtering. According to the waveform of the axle weight weighing, we can know that the maximum value at this time is the real weight of the car.
In this instrument, the serial port is used for both display and communication, and we can easily switch through FPGA. As shown in Figure 1, when the control signal is 1, RXD and TXD are used for display, and when the control signal is 0, they are used to communicate with the host computer.
We choose an ideal low-pass filter with a Hamming window, and its normalized cutoff frequency is 0.25, as shown in Figure 2. The car weighing signal is a DC signal containing multiple components of noise as shown in Figure 3. After the 1000 data are filtered by the FPGA FIR and averaged at 8 points, 125 data are provided to the microcontroller, and its waveform is shown in Figure 4.
The peak-to-peak value of the noise before filtering is about 0.1V, while the axle weight signal at this time is 1, which will seriously affect the measurement accuracy. After filtering, we can see that the situation has been significantly improved, and the peak-to-peak value of the noise signal is suppressed within the range of 0.02V, which greatly improves the signal-to-noise ratio and thus improves the measurement accuracy.

Conclusion
This design not only realizes the hardware digital filter circuit, but also reduces many gate circuits and combinational logic circuits. It uses relatively few devices to achieve relatively complex functions and reduces the failure rate. The dynamic weighing instrument for automobiles designed with this method has good real-time performance and high accuracy, and has now been put into mass production.