The MAX2235 is a three-stage power amplifier that operates in the 800MHz to 1000MHz range and can provide up to 30dBm output power for GSM and ISM devices. However, it is not easy to achieve the best performance in actual design, and a good PC board layout is a prerequisite. This article provides relevant practical experience of proven circuit board layout to help users understand the characteristics of power amplifiers and the basic principles of the described method.
Overview
The MAX2235 is a three-stage power amplifier that operates from 800MHz to 1GHz and can provide up to 30dBm output power for GSM and ISM devices. However, it is not easy to achieve optimal performance in actual applications, and a good PC board layout must be ensured. Otherwise, an unreasonable circuit board layout will not optimize system performance.
This article provides a proven circuit board layout to help users understand the characteristics of power amplifiers and the basic principles of the methods described. As a new layout guide, this article helps designers of the MAX2235 avoid some common mistakes and achieve optimal performance in their designs.
Power Supply Bypassing and Interstage Matching
One of the most important considerations when using this device is interstage matching. Since the amplifier consists of three independent amplifier stages, each with slightly different impedance characteristics, the three stages must be matched to each other to provide maximum power transfer.
The MAX2235's VCC pins 3, 5, 8, and 9 are not simply power supply pins that need to be bypassed. Lumped component capacitance (and parasitic capacitance) interacts with the device's internal circuitry to affect interstage matching. Therefore, the designer can customize the matching circuit for a specific application.
To take advantage of the design flexibility, there is capacitance between the VCC via and the device pin, and the position of the bypass capacitor can be slightly adjusted along the VCC lead. The optimal lead length between the interstage capacitor and the IC pin needs to be determined empirically, and the required operating frequency is obtained by changing the capacitance on the VCC lead (see Figure 1). High-Q capacitors are usually used in these locations to achieve the best match, and components with a size of 0402 are easy to adjust physically (in contrast, components with a size of 0603 have almost no room for adjustment, and components with a size of 0201 are more difficult to control). In this design application, Murata GJM1555 series components were selected (previously GJ615 was selected) to achieve better performance. This series of components has a Q value greater than 100 at 900MHz.
Assuming that the power supply pins of the power amplifier are matched between stages, it is very important to isolate the leads from each other (note: "isolation" here refers to pure RF isolation. Of course, the lines are DC coupled). If the power supply pins are not matched between stages, some RF energy may be coupled from one stage to another, which is very detrimental to system performance. Using a "star topology" is an effective way to isolate the power supply noise of each stage. This structure leads each power line from a single point, which is bypassed by a large-capacity capacitor. Then, these power lines are distributed on the bottom layer of the PC board and are properly isolated from each other. Compared with the dielectric of the inner layer of the circuit board, the ground layer isolates these power lines, thereby reducing the coupling between the bottom VCC lines. Each isolated line is locally bypassed by an interstage matching capacitor and matched to an internal node. In order to place the capacitors close to the IC and effectively control the matching, it is more reasonable to place the capacitors on the top layer. Figure 2 shows the recommended component layout diagram.
Grounding Scheme
The MAX2235 is packaged in a TSSOP-EP package with an exposed ground pad on the bottom of the chip. This pad must be connected to ground because the output stage of the power amplifier is grounded at this point. Without a low-inductance ground path, there will be troublesome transmission attenuation, resulting in reduced gain. Heat dissipation from the IC to the PC board ground plane is also achieved through this physical connection. It is best to design a large ground area for the exposed pad. During assembly, a return path should also be provided, that is, the PC board pad should have multiple vias. All GND pins of this IC can be directly returned to the same pad, providing the shortest ground path for the other stages of the power amplifier (see Figure 3).
Output Network
The existing evaluation board can be misleading in this area. It is designed for a specific frequency band and should not necessarily be copied for other applications. The evaluation board uses 30AWG wire with 0 from pin 16 to VCC.
Maxim does not currently recommend the output shorting and resistor pull-up method in new designs. Instead, use an L||C shunt pull-up to VCC for best performance. If the LC parallel resonance is carefully chosen, it will appear to have a higher impedance at sensitive frequencies (which will not affect the matching), but it will greatly reduce harmonics. When designing at 915MHz, the inductor values of 10nH and 3.3pF will produce very good harmonic suppression and greatly reduce the interference of the output matching. When designing the
output matching, a similar approach can be used as the interstage matching. To accurately adjust the output impedance of the power amplifier, the position of the output shunt capacitor can be changed along the transmission line. The evaluation board uses two components for matching. To improve the adjustment capability, a four-component (series L, shunt C, series L, shunt C) matching scheme can be used (see Figure 4). Regardless of the method used to achieve impedance transformation, it is recommended to use a controlled impedance transmission line surrounded by many adjacent ground vias. A continuous RF ground return path can greatly reduce PC board losses and improve harmonic suppression. It is also important to note that using high-Q components (>100 at the desired frequency) when matching is critical to achieving optimal prototype and product performance, and the Murata GJM1555 series (or equivalent circuit) is recommended.
Summary
As an RF power amplifier, the MAX2235's optimal performance depends on careful and thorough circuit layout during PC board layout. Before building the first prototype, the following items need to be considered thoroughly.
Interstage Matching The VCC bypass/interstage matching capacitors should be placed as close to the IC pins (pins 3, 5, 8, and 9) as possible and allow for position adjustment during debugging. Use high-Q components to achieve the best performance.
VCC wiring power supply wiring should make the different PA level power line spacing maximum (coupling minimum), the use of "star topology" on the bottom of the PC board is very effective. VCC termination global bypass capacitor.
Grounding provides the shortest and lowest inductance ground path for each IC pin. Considering the reflow soldering and the manufacturing process of the exposed pad on the bottom of the IC, the exposed pad must be grounded!
The output matching uses high Q value components and four-component matching, as well as impedance-controlled transmission lines. Pull-up inductors are used before matching to suppress harmonics without affecting impedance transformation.
Figure 5 shows how the key features above are implemented, and Figure 6 shows the "star topology" of other Maxim evaluation boards.