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How to make a good PCB board?
Everyone knows that making a PCB board is to turn the designed schematic diagram into a real PCB circuit board. Please don't underestimate this process. There are many things that work in principle but are difficult to achieve in engineering, or things that others can achieve but others cannot. Therefore, it is not difficult to make a PCB board, but it is not an easy thing to make a good PCB board. The two major difficulties in the field of microelectronics are the processing of high-frequency signals and weak signals. In this regard, the level of PCB production is particularly important. The same principle design, the same components, and different people make different PCBs. So how can we make a good PCB board? Based on our previous experience, I would like to talk about my views on the following aspects: 1: To define the design goal When accepting a design task, we must first define its design goal, whether it is an ordinary PCB board, a high-frequency PCB board, a small signal processing PCB board, or a PCB board that processes both high frequency and small signals. If it is an ordinary PCB board, as long as the layout and wiring are reasonable and neat, and the mechanical dimensions are accurate, it will be fine. If there are medium-load lines and long lines, certain means must be used to deal with them to reduce the load. The long lines must be driven more strongly, and the focus is on preventing long line reflections. When there are signal lines exceeding 40MHz on the board, these signal lines must be given special consideration, such as crosstalk between lines. If the frequency is higher, there will be stricter restrictions on the length of the wiring. According to the distributed parameter network theory, the interaction between high-speed circuits and their connections is a decisive factor and cannot be ignored in system design. With the increase of gate transmission speed, the opposition on the signal line will increase accordingly. The crosstalk between adjacent signal lines will increase proportionally. Usually, the power consumption and heat dissipation of high-speed circuits are also very large. When making high-speed PCBs, sufficient attention should be paid. When there are weak signals at the millivolt level or even microvolt level on the board, these signal lines need special care. Small signals are very easy to be weak because they are too weak. Interference from other strong signals requires shielding measures, otherwise the signal-to-noise ratio will be greatly reduced, so that the useful signal will be drowned by noise and cannot be effectively extracted. The board debugging should also be considered in the design stage. The physical location of the test point and the isolation of the test point cannot be ignored because some small signals and high-frequency signals cannot be directly measured by adding probes. In addition, other related factors should be considered, such as the number of board layers, the package shape of the components used, and the mechanical strength of the board. Before making a PCB board, you must have a clear idea of the design goals of the design and understand the functions of the components used and the requirements for layout and wiring. We know that some special components have special requirements during layout and wiring, such as the analog signal amplifiers used by LOTI and APH. The analog signal amplifier requires a stable power supply with small ripple. The analog small signal part should be kept as far away from the power device as possible. On the OTI board, a shielding cover is specially added to the small signal amplification part to shield stray electromagnetic interference. The GLINK chip used on the NTOI board uses the ECL process, which consumes a lot of power and generates a lot of heat. Special consideration must be given to the heat dissipation problem during layout. If natural heat dissipation is used, then
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The GLINK chip should be placed in a place with smooth air circulation and the heat dissipated should not have a big impact on other chips. If the board is equipped with speakers or other high-power devices, it may cause serious pollution to the power supply. This should also be given enough attention. 3. Considerations for component layout The first factor to be considered in the layout of components is electrical performance. Components with close connections should be placed together as much as possible. Especially for some high-speed lines, they should be as short as possible. Power signals and small signal devices should be separated. Under the premise of meeting the circuit performance, the components should be placed neatly and beautifully for easy testing. The mechanical size of the board and the location of the socket should also be carefully considered. The grounding in the high-speed system and the transmission delay time on the interconnection line are also the first factors to be considered in system design. The transmission time of the signal line has a great influence on the overall system speed, especially for high-speed ECL circuits. Although the speed of the integrated circuit itself is very high, the delay of about 2ns for every 30cm line length due to the use of ordinary interconnection lines on the baseboard can greatly reduce the system speed. Synchronous working components such as shift registers and synchronous counters are best placed on the same plug-in board because they are different. The transmission delay time of the clock signal on the plug-in board is not equal, which may cause the shift register to produce errors. If it cannot be placed on the same board, the length of the clock line connected from the common clock source to each plug-in board must be equal where synchronization is critical. Consideration of four pairs of wiring. With the completion of the design of OTNI and star fiber optic network, there will be more boards with high-speed signal lines above 100MHz that need to be designed. Here we will introduce some basic concepts of high-speed lines. 1. Transmission line. Any long signal path on the printed circuit board can be regarded as a transmission line. If the transmission delay time of the line is much shorter than the signal rise time, then the reflections generated during the signal rise will be submerged and no overshoot, kickback and ringing will appear. For most of the current MOS circuits, since the ratio of the rise time to the line transmission delay time is much larger, the routing can be measured in meters without signal distortion. For faster logic circuits, especially ultra-high-speed ECL For integrated circuits, due to the increase in edge speed, if no other measures are taken, the length of the trace must be greatly shortened to maintain signal integrity. There are two ways to make high-speed circuits work on relatively long lines without serious waveform distortion. TTL uses Schottky diode clamping for fast falling edges so that the overshoot is clamped at a level one diode voltage drop lower than the ground potential, which reduces the subsequent kickback amplitude. Slower rising edges allow overshoot, but it is attenuated by the relatively high output impedance 5080 of the circuit in the level H state. In addition, due to the greater noise immunity of the level H state, the kickback problem is not very prominent. For HCT series devices, if Schottky diode clamping and series resistor termination methods are combined, the improvement effect will be more obvious.
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When there is fan-out along the signal line, at higher bit rates and faster edge rates, the TTL shaping method introduced above is somewhat insufficient because there are reflected waves in the line. They will tend to be synthesized at high bit rates, causing serious signal distortion and reduced anti-interference ability. Therefore, in order to solve the reflection problem, another method is usually used in the ECL system: line impedance matching. This method can control the reflection and ensure the integrity of the signal. Strictly speaking, transmission lines are not very necessary for conventional TTL and CMOS devices with slower edge speeds. For high-speed ECL devices with faster edge speeds, transmission lines are not always necessary. However, when transmission lines are used, they have the advantages of predicting connection delays and controlling reflections and oscillations through impedance matching. 1 The basic factors that determine whether to use transmission lines are the following five. They are: 1. The edge rate of the system signal 2. The connection distance 3. Capacitive load (the amount of fan-out) 4. Resistive load 5. The termination method of the line 5. The allowable percentage of kickback and overshoot 2. The degree of reduction in AC noise immunity 2. Several types of transmission lines (1) Coaxial cable and twisted pair are often used to connect systems. The characteristic impedance of coaxial cable is usually 50 and 75. The characteristic impedance of twisted pair is usually 110. 2 Microstrip line on printed circuit board Microstrip line is a strip conductor (signal line) separated from the ground plane by a dielectric. If the thickness, width and distance between the line and the ground plane are controllable, its characteristic impedance can also be controlled. The characteristic impedance Z0 of microstrip line is: Where Er is the relative dielectric constant of the printed circuit board dielectric material, 6 is the thickness of the dielectric layer, W is the width of the line, and t is the thickness of the line. The transmission delay time of microstrip line per unit length depends only on the dielectric constant and has nothing to do with the width or spacing of the line. (3) Stripline in printed circuit board Stripline is a copper strip line placed in the middle of the dielectric between two layers of conductive planes. If the thickness and width of the line, the dielectric constant of the medium and the distance between the two layers of conductive planes are controllable, then the characteristic impedance of the line is also controllable. The characteristic impedance B of stripline is:
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In the formula, b is the distance between the two ground planes, W is the width of the line, and t is the thickness of the line. Similarly, the transmission delay time of the strip line per unit length is independent of the width or spacing of the line, and only depends on the relative dielectric constant of the medium used. 3 Termination of transmission line. When a line is terminated at the receiving end with a resistor equal to the characteristic impedance of the line, the transmission line is called a parallel termination line. It is mainly used to obtain the best electrical performance, including driving distributed loads. Sometimes, in order to save power consumption, a 104 capacitor is connected in series with the termination resistor to form an AC termination circuit, which can effectively reduce DC loss. A resistor is connected in series between the driver and the transmission line, and the end of the line is no longer connected to the termination resistor. This termination method is called series termination. Overshoot and ringing on longer lines can be controlled by series damping or series termination technology. Series damping is the use of a resistor that is connected to the driver. The small resistor in series with the gate output is generally 1075 to achieve this. This damping method is suitable for use with lines whose characteristic impedance is controlled (such as bottom board wiring, circuit boards without ground planes, and most winding wires). When series termination is used, the sum of the value of the series resistor and the output impedance of the circuit driving the gate is equal to the characteristic impedance of the transmission line. Series termination wiring has the disadvantages of only being able to use lumped loads at the terminal and having a long transmission delay time. However, this can be overcome by using a method of using redundant series termination transmission lines. 4 Non-terminated transmission lines can be used without series termination or parallel termination if the line delay time is much shorter than the signal rise time. If the round-trip delay signal of a non-terminated line takes a shorter time to go back and forth on the transmission line than the rise time of the pulse signal, then the kickback caused by non-termination is approximately 15 of the logic swing. The maximum open line length is approximately Lmaxtr/2tpd, where tr is the rise time and tpd is the transmission delay time per unit line length. 5 Comparison of several termination methods. Parallel termination wiring and series termination wiring have their own advantages. Whether to use one or both depends on the design.
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It depends on the designer's hobbies and system requirements. The main advantages of parallel termination are fast system speed and complete and distortion-free signal transmission on the line. The load on the long line will neither affect the transmission delay time of the driving gate that drives the long line nor its signal edge speed, but will increase the transmission delay time of the signal along the long line. When driving a large fan-out, the load can be distributed along the line through branch short lines, instead of having to lump the load at the end of the line as in the series termination. The series termination method enables the circuit to drive several parallel load lines. The delay time increment caused by the capacitive load of the series termination is about twice that of the corresponding parallel termination. The short line slows down the edge speed and increases the driving gate delay time due to the capacitive load. However, the crosstalk of the series termination is lower than that of the parallel termination. The main reason is that the signal amplitude transmitted along the series terminal connection is only half of the logic swing amplitude, so the switching current is only half of the switching current of the parallel terminal connection. The signal energy is small, and the crosstalk is also small. 2. PCB board wiring technology When making PCB, whether to use double-sided board or multi-layer board depends on the highest operating frequency, the complexity of the circuit system and the requirements for assembly density. When the clock frequency exceeds 200MHZ, it is best to use a multi-layer board. If the operating frequency exceeds 350MHz, it is best to use a printed circuit board with polytetrafluoroethylene as the dielectric layer because its high-frequency attenuation is smaller, the parasitic capacitance is smaller, the transmission speed is faster, and because Z0 is larger, it saves power consumption. The following principles are required for the routing of printed circuit boards: 1. All parallel signal lines should be kept as far apart as possible to reduce crosstalk. If there are two signal lines that are close to each other, it is best to run a ground wire between the two lines to provide a shielding effect. (2) When designing signal transmission lines, avoid sharp turns to prevent sudden changes in the characteristic impedance of the transmission line and reflection. Try to design it into a uniform arc line of a certain size. The width of the printed line can be calculated according to the characteristic impedance calculation formula of the microstrip line and strip line mentioned above. The characteristic impedance of the microstrip line on the printed circuit board is generally between 50 and 120. To obtain a large characteristic impedance, the line width must be made very narrow, but very thin lines are not easy to make. Considering various factors, it is generally more appropriate to choose an impedance value of about 68, because choosing a characteristic impedance of 68 can achieve the best balance between delay time and power consumption. A 50 transmission line will consume more power. Although a larger impedance can reduce power consumption, it will increase the transmission delay time. Because the negative line capacitance will cause the transmission delay time to increase and the characteristic impedance to decrease, but The intrinsic capacitance per unit length of a line segment with very low characteristic impedance is relatively large, so the transmission delay time and characteristic impedance are less affected by the load capacitance. An important feature of a transmission line with proper termination is that the branch short line should have no effect on the line delay time. When Z0 is 50, the length of the branch short line must be limited to 25cm to avoid large ringing. 4 For double-sided boards or four-layer boards in six-layer boards, the lines on both sides of the circuit board must be perpendicular to each other to prevent mutual induction and crosstalk. 5 If there are high-current devices on the printed circuit board, such as relays, indicator lights, speakers, etc., their ground lines should be separated and routed separately to reduce noise on the ground line. The ground lines of these high-current devices should be connected to an independent ground bus on the plug-in board and the backplane, and these independent ground lines should also be connected to the ground point of the entire system.
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6 If there is a small signal amplifier on the board, the weak signal line before amplification should be kept away from the strong signal line and the routing should be as short as possible. If possible, it should be shielded with a ground wire.
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