Some key issues in data collection and conversion

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Some key issues in data collection and conversion [Copy link]

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--Data acquisition and conversion systems are used to convert analog signals into digital form for analysis or transmission. Analog signal input is usually converted by mutual inductors and sensors to corresponding electrical signals such as pressure, temperature, stress or tension, flow. The system's ability to preserve signal accuracy and integrity is the main indicator of the system. How to design a high-performance data acquisition and conversion system requires consideration of many factors. This article discusses some of the key issues.

The basic framework of the data acquisition and conversion system
---The basic elements required to collect and convert analog signals into corresponding digital forms include: analog multiplexers and signal conditioning; amplifiers; analog-to-digital converters; PC or MCU.
---Figure 1 is a typical block diagram of a data acquisition system. Current data acquisition systems usually include all the elements required for data acquisition and conversion, but sometimes may not include input filtering and signal conditioning before analog multiplexing. The analog signal is time-multiplexed by an analog multiplier; the multiplexer output signal is input to the A/D converter through an amplifier. We can program the sample/hold to collect and hold digital multiplexed data samples converted by each A/D converter. The converted data appears at the output of the A/D converter in parallel or serial form for further processing by the terminal equipment.

System Sampling Rate
- The application and end use of the converted data determine the sampling rate and conversion rate required by the data acquisition and conversion system. The system sampling rate is determined by the highest bandwidth channel, the number of data channels, and the number of samples per cycle.

Aliasing Error
--- According to the Nyquist sampling theorem, in an ideal sampled data system, at least two samples are required for each cycle of the data bandwidth so that the sampled signal can be recovered without loss of information. Therefore, the first thing to consider when determining the system sampling rate is aliasing error, which is the information loss caused by insufficient number of samples per cycle of the signal frequency. Figure 2 shows the aliasing error caused by insufficient number of samples per cycle of the data bandwidth.
--- How many samples are required per cycle
--- The answer to this question depends on the average error tolerance allowed, the reconstruction method (if any), and the ultimate use of the data.
--- The average accuracy of the sampled data can be improved by: (1) increasing the number of samples per cycle; (2) pre-sampling filtering before multiplexing, or (3) filtering the D/A converter output. Figure 3 shows the reconstruction of the sampled data, where fS = 2fMAX.
--- As shown in Figure 4, the average accuracy of the sampled data will increase significantly with just a small increase in the number of samples per cycle. The theoretical limit is the throughput accuracy of the acquisition and conversion system when sampling continuously. For the zero-order reconstruction of the data, as can be seen from Figure 4, to achieve an average accuracy of 90% or higher for the reconstructed sampled data, 10 samples are required for each cycle of the data bandwidth. The commonly used range is 7 to 10 samples per cycle.

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Sampling Error
- Sampling error is defined as the amplitude and time error of the sampled data point caused by the uncertainty of dynamic data changes during the sampling process. In data acquisition and conversion systems, the sampling error can be reduced or made insignificant by using a sample/hold or a fast A/D converter. For sinusoidal data, the maximum sampling error occurs at zero crossing, when the maximum dv/dt occurs.

A few notes on A/D converters
--- The conversion speed and resolution of an A/D converter are the two most important parameters. A brief discussion of A/D converter terminology below will help readers better understand system resolution and accuracy.
--- Speed: Mainly composed of the sampling time and conversion time of the A/D converter. A/D converter manuals will indicate the conversion speed in the sampling dynamics parameter. Sometimes it is the data throughput rate. The sampling rate or data throughput rate of successive approximation AD converters generally ranges from tens of thousands of times per second to several megacycles per second.
--- Resolution : The number of bits in the A/D converter determines the resolution of the data acquisition system. The definition of A/D converter resolution is as follows:
--- 1 LSB = VFSR/2n,
--- LSB = least significant bit, VFSR = full-scale input voltage range, where n is the resolution of the A/D converter. The number of bits determines the number of digital codes, and there are 2n discrete digital codes for the A/D converter. For the purpose of this discussion, we will use a binary successive approximation A/D converter. Table 1 shows the resolution and LSB value of a typical A/D converter.
--- Signal-to-noise ratio: The signal-to-noise ratio of an ideal AD converter is SNRdB=6.02×n-1.76. Table 2 is a simple comparison table of the number of bits of an AD converter and the signal-to-noise ratio.
--- Accuracy: Assume that all analog values are located at the input of the A/D converter. The A/D converter quantizes or encodes a specific analog input value into a corresponding digital code as an output. The above digital code has an inherent uncertainty or quantization error of ±1/2LSB. That is, the distance between the analog voltage represented by the quantized digital code and the midpoint of the adjacent digital code is within ±1/2LSB. The accuracy of the A/D converter will not exceed the range allowed by the inherent ±1/2LSB quantization error. Analog errors such as gain, offset, and linearity error also affect the accuracy of the A/D converter. Gain and offset are usually adjustable to zero, but linearity error is not adjustable because it is caused by the fixed value ladder resistor network and network switch matching. Most high-quality A/D converters have a linearity error of less than ±1/2LSB. Another important error to consider is differential linearity error. In an ideal A/D converter, the step size between adjacent transition points is one LSB. The differential linearity error is the difference between the adjacent transition points in the actual A/D converter and the ideal LSB step size. This error must be less than one LSB to ensure that there will be no missing codes. An A/D converter with a linearity error of ±1/2LSB does not necessarily mean that there will be no missing codes. Figure 5 shows a plot of differential linearity, offset, and gain errors.

--- Binary Code: Binary coded data format is the most common in digital computer type applications, where processing is usually done in binary form. The most commonly used binary encodings in A/D converters are:
--- 1. Unipolar Standard Binary (USB) - used for 0 to ±10V, etc.
--- 2. Bipolar Offset Binary (BOB) - used for bipolar analog signal ranges, such as ±5V, ±10V, etc.
--- 3. Bipolar Bi-Component (BTC) - used for bipolar analog signal ranges in many digital computer applications.
--- Two types of BCD encoding are used in A/D converters, unipolar BCD and sign-magnitude BCD (SMD).