Power saving with DPM

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Power saving with DPM [Copy link]

The defining characteristic of DPM is the rapid, high-frequency nature of power management. Unlike the traditional desktop/laptop paradigm, which operates in hundreds of milliseconds or seconds, DPM enables the management of each device only as fast as the time required to change the supply voltage (Tt) or the CPU clock (Tt). This nature
　　of DPM is best illustrated by the power savings between frames of streaming video. High-quality streaming video runs at 24 frames per second, leaving 41.66 milliseconds of available time between frames for rendering the next frame and other activities. Even on a low-power CPU core running at 40-60MHz, 41.66 milliseconds represents "a long time" and presents ample opportunity for power management.
　　After a frame of video is presented to the user, activity proceeds as follows:
　　· The CPU requests/fetches the next frame of compressed video, either from the local storage system or from a streaming file buffer - low CPU activity ·
　　The compressed image is transferred (via DMA or shared memory) to the codec (DSP or other dedicated hardware) for decompression/rendering - moderate CPU activity, high codec activity
　　· When the image is ready, i.e. decompressed, the CPU calls the video interface driver - high CPU utilization and ultimately high display utilization
　　· Throughout the image processing, the display backlight consumes energy. This parameter can also be reduced to a more modest consumption level by taking advantage of persistence of vision or gamma adjustment on the image itself. Summarizing
the energy requirements during the various stages of video frame processing results in the waveform shown in Figure 2, with the area “above the line” representing potential energy savings.
　　Benefits of Clock Frequency Scaling vs. Voltage Scaling
　　CPU clock frequency scaling is a common way to save power in embedded devices. At a given voltage, a higher clock speed requires more power to push the logic level to saturation (overcome capacitance) than a lower clock speed. Furthermore, clock frequency scaling is relatively easy to implement, at least within the CPU core. However, voltage scaling offers far greater benefits—power consumption is proportional to clock frequency, and almost the cube of system voltage!
DPM itself makes no assumptions about the relationship between clock frequency and voltage. In theory, both parameters can be varied independently and continuously.
　　In practice, there is a minimum feasible voltage (minimum supply voltage) at a given clock frequency—lower voltages will not be able to push the logic levels to saturation within the required cycle time, while higher voltages will simply consume more power. To simplify the power management algorithm, schemes such as DPM do not attempt to vary the clock and voltage continuously either. Instead, the designer selects a series of reasonable operating points on the clock/voltage continuum, and DPM drives the CPU and other power-managed system components point by point.