SPI is a common communication method between the master chip and the slave chip, and is widely used. After all, it is easy to access such as storage chips, driver chips, power chips, etc.
Since I have used W25x series memory chips on other platforms before, I wanted to try the SPI communication between the STM32 development board and the W25x chip, and I checked the schematic diagram
From the schematic diagram, we can also see that there is this W25X64 position
Then I looked for the U2 position on the board, but found that there was no chip soldered on it.
In other words, it is reserved, which is a bit embarrassing.
Since we can't communicate with the external chip, let's try a simple SPI send.
According to the chip pin diagram, we can see that PA5, PA6, and PA7 are the SCK, MISO, and MOSI pins of SPI1 respectively. Then we find another pin as CS pin, and then we can test the SPI function through these four pins.
I found an SPI example, configured it roughly, burned it to the board, connected it to the logic analyzer, and found that I couldn't collect waveforms well, even the basic clock signal couldn't be collected well, which was a headache. There were 8 clock signals, but I could only collect 3/4 of them. Then I had to plug and unplug the signal line many times, open and close the software many times, and even suspected that the logic analyzer in my hand was broken. After two days of intermittent attempts, I felt that it was most likely a problem with the logic analyzer. Then I planned to buy another logic analyzer online.
When I was looking at logic analyzers on Taobao, I was thinking about buying one with a higher sampling rate so that I could collect signals with higher frequencies. Then I looked at the device I had and found that it only supported 24M at most. According to the device's recommendation, a 24M sampling rate can generally only collect signals of 2M or less.
At this time, I suddenly realized that maybe the SPI frequency of ST was set too high, which caused the logic analyzer to collect data poorly. I immediately changed the SPI clock division from 4 to 64.
Recompile and burn it to the board, collect it with a logic analyzer, and it will be ready immediately
The output value is consistent with the program setting, which means the problem is the SPI frequency. Hahahahaha, I made a low-level mistake, but fortunately I found it in time and saved money on buying a logic analyzer.
At this point, the SPI module evaluation is completed
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