Ferroelectric RAM (FRAM)

QWE4562009

Ferroelectric RAM (FRAM) [Copy link]

Ferroelectric memory (FRAM)
SI and SO are connected to the same IO port of the main control MCU. What's going on? Aren't SPI and IIC both SCK, DIO, VCC, GND four-wire communication? Why do we need to connect so many pins to the MCU's I?
https://atta.szlcsc.com/upload/public/pdf/source/20150407/1457707272442.pdf

Jacktang

It is recommended to understand the basics of SPI and IIC communication.

Jacktang

Let me explain it briefly.

"Aren't both SPI and IIC using four wires, SCK, DIO, VCC, and GND, for communication?"
The SPI interface is a serial interface that synchronizes clock and data. It should use four pins, SO, SI, SCK, and CS, and can be directly connected to any MCU with an SPI interface.
For MCUs without an SPI interface, SPI can be connected to a normal I/O port.

Jacktang

IIC is used for data transmission. The operation is basically realized by the status of the two pins SDA and SCL. There are 4 states: start, stop, data transmission, and response.

bigbat

The IIC/I2C data line is 2 lines SCK and SCL.

SPI has three data lines SO, SI, SCK,

Usually each chip has a CS control line, and some chips also have address lines

芯片老兵

Learned something.

The IIC/I2C data line is 2 lines SCK and SCL. SPI has three data lines SO, SI, SCK,

QWE4562009

Jacktang posted on 2023-5-6 22:48 Let's just briefly explain "Aren't SPI and IIC both SCK, DIO, VCC, and GND four-wire communications?" The SPI interface is a...

What I want to ask is, isn't it parallel if SI and SO are connected together like this?