[Evaluation and experience of Zhongke Yihaiwei EQ6HL45 development platform] +09.RSIC-V test (zmj)

卿小小 · Published on 2022-11-21 15:06

[Evaluation and experience of Zhongke Yihaiwei EQ6HL45 development platform] +09.RSIC-V test (zmj) [Copy link]

[Evaluation and experience of Zhongke Yihaiwei EQ6HL45 development platform] +09.RSIC-V test (zmj)

Let me first state the conclusion: There is no problem with the number of resources of the EQ6HL45 development board. The eLINX software has problems with its support for preprocessed code. The workload of code modification is relatively large, and RSIC-V was ultimately not run.

(The RISC-V process using other FPGAs will be shared later)

As an excellent open source processor architecture, RISC-V has attracted more and more attention. RISC, or Reduced Instruction Set Processor, is relative to CISC (Complex Instruction Set Processor) such as X86. The V in RISC-V is a Roman numeral, which is the Arabic numeral 5, referring to the fifth generation of RISC.

1. References

1.1 Resource Reference

There are many reference resources for RISC-V, and the ones listed below are for reference only.

The CoreLite Reference Manual contains very detailed RTL and SDK operation procedures, as well as Git resources. Other resources are basically based on the CoreLite Reference Manual.

//------☆Core reference:
//---Hummingbirdv2-E203-Core-and-SoC Manual
https://doc.nucleisys.com/hbirdv2/
//---Git resource reference:riscv-mcu/e203_hbirdv2
https://github.com/riscv-mcu/e203_hbirdv2

//------Other Gitee resource references (including source code and basic process description): Gitee open source project > Other open source > RISC-V development
//---e203 Hummingbird: RISCV-MCU/e203_hbirdv2 (recommended)
https://gitee.com/riscv-mcu/e203_hbirdv2?_from=gitee_search
//---tinyRV: liangkangnan/tinyriscv
https://gitee.com/liangkangnan/tinyriscv?_from=gitee_search
//---xiaowuzxc/Little Sparrow processor (integrated tinyrv and e203)
https://gitee.com/xiaowuzxc/SparrowRV

//------Video reference (Xilinx solution):
a. Migrate Hummingbird E203 to other Xilinx FPGA devices
https://www.bilibili.com/video/BV1HM4y1A7X6/?spm_id_from=333.788.recommend_more_video.3&vd_source=29c4c65318d9617647948d0328dda1e3
b. EGO1 transplantation RISC-V E203
https://www.bilibili.com/video/BV1yS4y1j7ka/?spm_id_from=333.788.recommend_more_video.-1&vd_source=29c4c65318d9617647948d0328dda1e3
c.【RISC-V】Teach you how to use Hummingbird E203-v2 step by step
https://www.bilibili.com/video/BV1ia411U76P/?is_story_h5=false&p=1&share_from=ugc&share_medium=iphone&share_plat=ios&share_session_id=46F37C64-B4B8-456E-8EF8-BA64F1454FEF&share_source=QQ&share_tag=s_i&timestamp=1668151893&unique_k=MK8GmSQ&vd_source=29c4c65318d9617647948d0328dda1e3

//------tinyrsicv document: Writing a RISC-V processor from scratch
https://liangkangnan.gitee.io/2020/04/29/%E4%BB%8E%E9%9B%B6%E5%BC%80%E5%A7%8B%E5%86%99RISC-V%E5%A4%84%E7%90%86%E5%99%A8/

1.2 Feasibility Analysis (Resource Assessment)

The resources of the Zhongke Yihaiwei EQ6HL45 development platform can be configured with RSIC-V after evaluation. The resource evaluation is as follows:

//------tinyrsicv@xc7a35tftg256-1

//------Hummingbird e203@xc7z010clg400-2

//------Zhongke Yihaiwei EQ6HL45 development board

LUT/FF/Memory/DSP can meet the resource requirements of hummingbird e203 or tinyrsicv.

In actual operation, it is found that the eLINX software does not support the preprocessing command "define" very well, which is mainly reflected in the port declaration part, for example:

//------Part of the code involved in the preprocessing command
`define E203_ADDR_SIZE  32
`define E203_PC_SIZE   32
`define E203_XLEN     32
//------Port declaration
output             sysper_icb_cmd_valid,
input              sysper_icb_cmd_ready,
output [`E203_ADDR_SIZE-1:0]  sysper_icb_cmd_addr, 
output             sysper_icb_cmd_read, 
output [`E203_XLEN-1:0]     sysper_icb_cmd_wdata,
output [`E203_XLEN/8-1:0]    sysper_icb_cmd_wmask,

In the above code, the port definition uses preprocessed content, and the eLINX software directly reports an error or parses an error. Quartus-II and Xilinx software do not have this problem.

2. Complete process (organization)

Based on the content of "Resource Reference", the complete RSIC-V process is as follows:

//------Prepare
a.RTL software: eLINX software
b.SDK software: Nucleistudio-IDE (v2020.9)
    |---https://www.nucleisys.com/download.php
c. Code: Hummingbird e203 code
    |---https://gitee.com/riscv-mcu/e203_hbirdv2?_from=gitee_search
//------RTL project steps
a. Create a project
b. Import the RTL code of e203
    |---e203_hbirdv2/rtl/e203
    |---Import the system.v file and set it to top (set_as_top)
    |---Import the frequency division code clkdivider.v (generate clock 32768Hz)
c. Add IP
    |---reset
    |---clock：50MHz->16MHz
d. Frequency division code: clkdivider.v, the final output is 32768Hz (you can get 32.768kHz by counting at 100MHz)
e. Set header files and macro definitions:
    |---e203_defines.v
    |---`define FPGA_SOURCE
f. Constraints: clock, reset, JTAG (TDI/TDO/TCK/TMS)
h. After completing the above steps, Synthesis + IMPL
//------SDK project steps
a. Download the software Nucleistudio-IDE from the Nuclei website.
b. Open eclipse and create a project.
c.c++_Prj or c_Prj: E203, baremetal_HW, Build project, modify openocd_hbird.cfg (delete Flash)

2.1 RTL Engineering

RTL engineering is the engineering on the FPGA side, which is completed through eLINX software. The main contents are importing rsicv code, modifying IP, adding constraints, etc.

During the actual operation, I found that the eLINX software's support for the preprocessing command "·define" was not very friendly, mainly reflected in the direct error report of the parsing error in the port declaration part. After deleting and modifying it for an afternoon, various errors were still reported.

On the contrary, there is basically no resistance in the process of implementing the Hummingbird e203 and tinyrsicv projects on two different Xilinx boards...

//------eLINX@Hummingbird e203 error

//------Xilinx Vivado runs Hummingbird e203 and tinyrsicv without any pressure

2.2 SDK Project

SDK project is the software project for developing RSIC-V. Its development requires downloading SDK software: Nucleistudio-IDE (v2020.9).

//------Nuclei-Studio-IDE (Windows x86-64 2020.09版）
https://www.nucleisys.com/download.php

The test code is implemented through the serial port. The code is as follows:

//------SDK
#include <stdio.h>
#include <time.h>
#include <stdlib.h>
#include "hbird_sdk_soc.h"

int main(void)
{
   printf("******************************\r\n",i);
   printf("It's EQ6HL45-EVL-v1.0\r\n",i);
   for (int i = 0; i < 10; i ++) {
     printf("%d: Hello World From My risc-v\r\n",i);

   }
   printf("******************************\r\n",i);
   return 0;
}

3. About RISC-V debugger

The debugger of RSIC-V core uses the RISC-V debugger of Silicon Speed Technology (Sipeed USB-JTAG/TTL RISC-V debugger STLINK V2 STM8/STM32 simulator).

//------END

lugl4313820

I saw a debugger, it's pretty good, is it expensive?