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[Evaluation and experience of Zhongke Yihaiwei EQ6HL45 development platform] +03. Flowing light simulation and board test (zmj) [Copy link]

 

[Evaluation and experience of Zhongke Yihaiwei EQ6HL45 development platform] +03. Flowing light simulation and board test (zmj)

The Zhongke Yihaiwei EQ6HL45 development platform provides a very rich interface test DEMO.

This section uses the simulation and on-board test of the LED water lamp to understand the development process and simulation process of the elinx software to develop FPGA, and also verifies whether the LED lights on the board are normal.

//------Main reference documents

//------eLinx software user manual
UG102_eLinx_Design_Suite_User_Guide_ehiway_v2021.11.pdf
//------Zhongke Yihaiwei EQ6HL45 development board DEMO manual
EQ6HL45FPGA Development Platform User Manual.pdf

02_sim_led

EQ6HL45FPGA开发平台用户手册.pdf (6.46 MB, downloads: 2)
UG102_eLinx_Design_Suite_User_Guide_ehiway_v2021.11.pdf (9.06 MB, downloads: 1)

1. Preparation

Zhongke Yihaiwei's eLinx Design Suite uses the third-party software Mentor's ModelSim as a simulation tool. Therefore, before starting the simulation, you need to install Modelsim and configure the eLINX library file.

1.1 ModelSim software installation

My computer uses ModelSim-10.0c, and the specific installation process is not described in detail here.

//------ModelSim installation tutorial

//------ModelSim installation tutorial
https://www.bilibili.com/read/cv14582310?from=search
//------other
1. Laptop: w7 system 64-bit;
2. Software: modelsim-win64-10.6d-se (installation file and crack file)
3. Baidu Cloud download address
Link: https://pan.baidu.com/s/1dGcmGHL2q1wzh2vX1OMm5w
Extraction code: ox09

1.2 eLINX simulation settings

After installing ModelSim, you also need to specify the index directory of the simulation library and simulation software.

The simulation library (Simulation_Library) provides FPGA IP models and other content for third-party software. If it is pure RTL code simulation, there is no need to set this item.

//------ELINX simulation settings of eLINX software

//------ELINX simulation settings of Elinx software (fill in according to the actual path)
//---Simulation library settingsSimulation_Lib:
C:/Program Files (x86)/eHiWay/eLinx2.0/Simulation/elinx_lib
//---Third-party simulation software ModelSim settings:
C:/altera/modeltech64_10.0c/win64

1.3 Project Code

The engineering code flow_led is as follows:

`timescale 1 ps/ 1 ps
///////////////////////////////////////////////////// ////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 10-28-2021 09:38:40
// Design Name:
// Module Name: flow_led
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revision:
// Additional Comments:
//
///////////////////////////////////////////////////// ////////////////////////////////////

module flow_led(
   input sys_clk , //system clock
   input sys_rst_n, //system reset, low level is effective
     
   output reg [3:0] led //4 LED lights
   );

//reg define
reg [23:0] counter;

//************************************************ *****
//** main code
//************************************************ *****                                                                                                        
//The counter counts the system clock and times 0.2 seconds
always @(posedge sys_clk or negedge sys_rst_n) begin
   if (!sys_rst_n)
     counter <= 24'd0;
   else if (counter < 24'd1000_0000)
     counter <= counter + 1'b1;
   else
     counter <= 24'd0;
end

//Control the high and low levels of the IO port through the shift register to change the display state of the LED
always @(posedge sys_clk or negedge sys_rst_n) begin
   if (!sys_rst_n)
     led <= 4'b0001;
   else if(counter == 24'd1000_0000)
     led[3:0] <= {led[2:0],led[3]};
   else
     led <= led;
end

endmodule

2. Simulation

2.1 Simulation Code

The simulation code sim_led is as follows:

`timescale 1 ns/ 1 ps

module sim_led( );
   //------parameter
   parameter PERIOD_100M = 10; //100MHz = 10ns
  
   //------
   reg sys_clk;//100MHz
   reg sys_rst_n;//active low
  
   wire [03:00] led;
   //------
   initial begin
     sys_clk = 0;
   end
   always #(PERIOD_100M / 2) sys_clk = ~sys_clk;
  
   initial begin
   sys_rst_n = 0 ;
     $display("********************************************** **");
     $display("//---This is a simulation for flow_led.");
     $display("********************************************** **");
   #1_000;
   sys_rst_n = 1;
     $display("//---Simulation is start.");
     $display("//---...");
   #1000_000_000 ;//1000ms
     $display("//---Simulation is stop.");
   $stop();
   #1_000_000 ;//1ms
   $finish;
   end
   //------
   flow_led u_flow_led(
   .sys_clk (sys_clk ), //system clock
   .sys_rst_n (sys_rst_n ), //system reset, low level is effective
  
   .led (led ) //4 LED lights
   );

endmodule

2.2 Add simulation code

The steps to add simulation code are as follows:

//------Add simulation code
a. Double-click flow_Led.epr to open the flow light project.
b. Right-click Simulation_Sources and select Add_Sources.
c. Create sim_led file.

2.3 Executing Simulation

After completing the above steps, you can perform simulation function testing.

Double-click "Run_Behavioral_Simulation", ModelSim automatically simulates (note: automatically executes simulation code, very-nice), and the simulation is OK.

//------Run simulation steps:
a. Enter the project directory and double-click flow_Led.epr to open the flow light project.
b. Create or add the simulation file sim_led.v.
c. Run the simulation Run_Behavioral_Simulation.
d. At this time, ModelSim will be automatically opened and the simulation instruction "run -all" will be automatically executed to start executing the simulation code.

3. Board test

The board test steps are as follows, and the board verification is OK:

//------Board test
//---Prepare:
a. Compile the project to generate Bitstream;
b. Connect the JTAG writer to the development board and turn on the power of the board.
//---JTAG programming bit steps:
a.Auto-Detect: JTAG scans FPGA, and EQ6HL45 is scanned here;
b.Add-Files: add the burning file flow_led.jpsk;
c. Check "Program/Configure";
d. Click “Start” to start burning.

//------END

This post is from Domestic Chip Exchange

Latest reply

If you carefully observe the installation directory of the eLinx software and the process of its integrated procedure call, it is not difficult to see that it is a shell of Quartus. [attach]655481[/attach]   Details Published on 2022-11-8 22:40
 
 

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This development platform looks quite advanced.

This post is from Domestic Chip Exchange

Comments

Domestic FPGA, PIN-to-PIN alternative to the Spartan series. Although it does not have its own simulation tool like Vivado, it is really amazing that it can run automatically with one click after linking ModelSim.  Details Published on 2022-11-6 20:23
 
 
 

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qzc飘漾 posted on 2022-11-6 19:41 This development platform looks quite advanced...

Domestic FPGA, PIN-to-PIN alternative to the Spartan series.

Although it does not have its own simulation tool like Vivado, it is really amazing that it can run automatically with one click after linking ModelSim.

This post is from Domestic Chip Exchange
 
 
 

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Domestic FPGA, PIN-to-PIN alternative to the Spartan series.

Although it does not have its own simulation tool like Vivado, it is really amazing that it can run automatically with one click after linking ModelSim.

The OP’s post is very good!

This post is from Domestic Chip Exchange
 
 
 

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Do you use your own IDE? ModelSim is a good simulation software, and so is QuarutsII.

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Yes, the eLINX software from Zhongke Yihaiwei.  Details Published on 2022-11-7 14:45
 
 
 

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hustjtj0806 posted on 2022-11-7 06:48 Do you use your own integrated development environment IDE? ModelSim is a good simulation software, and so is QuarutsII.

Yes, the eLINX software from Zhongke Yihaiwei.

This post is from Domestic Chip Exchange
 
 
 

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In fact, it is a copy of Altera's Stratix series EP1S40/60/80 series.

eLinx software is just a shell of Quartus 11.0. . . .

This post is from Domestic Chip Exchange

Comments

My personal understanding is that eLINX looks like Quartus series software, but its functions are more like Vivado software. This is because the code supports some of Xilinx's comprehensive syntax. As for chip functions, the development and testing platform I use is Zhongke Yihaiwei EQ6HL45, which uses Zhongke Yihaiwei  Details Published on 2022-11-8 14:45
 
 
 

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mars4zhu posted on 2022-11-8 10:45 It is actually a copy of Altera's Stratix series EP1S40/60/80 series. The eLinx software is just a shell of Quartus 11.0. . ...

My personal understanding is that eLINX looks like Quartus series software, but its functions are more like Vivado software, because the code supports some of Xilinx's comprehensive syntax.

As for chip functions, the development and testing platform I use is the Zhongke Yihaiwei EQ6HL45, which uses the Zhongke Yihaiwei 6 series chip. This FPGA is benchmarked against AMD-Xilinx's Spartan-6 CSG324, with the same packaging, fully compatible internal banks, and almost completely identical pin definitions. According to the manufacturer, the EQ6HL45 can perfectly achieve in-situ replacement.

This post is from Domestic Chip Exchange
 
 
 

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Qing Xiaoxiao published on 2022-11-8 14:45 My personal understanding is that the appearance of eLINX is more like the Quartus series software, but the function is more like Vivado software. Because the code supports some Xili ...

If you carefully observe the installation directory of the eLinx software and the process of its integrated procedure call, it is not difficult to see that it is a shell of Quartus.

This post is from Domestic Chip Exchange
 
 
 

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