I have a question about the voltage regulator.

小太阳yy

I have a question about the voltage regulator. [Copy link]

 

As shown in the PMOS anti-reverse connection circuit above, the value of the voltage regulator D1 is 12V. This is to stabilize the voltage at the back end at around 12V. If the input voltage at the front end is 12.1V, then the voltage on D1 is 12V, and the voltage on R1 is 0.1V.

In this case, the current flowing through is very small, and it may not reach the 12V voltage stabilized by the diode, and may be a little lower than 12V. If the front-end input is 9V, then it is less than the 12V voltage stabilized by the voltage regulator. How many V does the output of the MOS tube output? My analysis is that it is 9V-0.7=8.3v at the beginning, and then when the MOS is fully turned on, it becomes 9V minus the voltage between DS, which has nothing to do with the voltage regulator. Is this analysis correct?

se7ens

Small voltage, small voltage drop

Large voltage will be clamped, the circuit is fine

maychang

"Then this is to stabilize the voltage at the back end at around 12V."

What is the "back end"? It's not clear.

maychang

"My analysis is that at the beginning it is 9V-0.7=8.3v, and then when the MOS is fully turned on it becomes 9V minus the voltage between DS, which has nothing to do with the voltage regulator tube. Is this analysis correct?"

correct.

Gen_X

This is not voltage regulation, but voltage limiting to protect Q1. It doesn't matter if it's too low, but if it's too high, it's limited to 12V, which is the requirement of MOS tube.

小太阳yy

Gen_X posted on 2022-9-22 17:57 This is not voltage regulation, but voltage limiting to protect Q1. It doesn't matter if it's too low, but it's limited to 12V if it's too high, which is the requirement of MOS tube.

Understanding teacher~

mgeandy

The circuit is used to limit the voltage greater than 12V (if it is lower, it can pass directly) and prevent reverse connection.

xl071310

The purpose of this voltage zener diode is to protect the MOS and limit the voltage across the GS of the MOS tube to no more than 12V to prevent the high input voltage from damaging the MOS tube. Of course, as long as the low voltage is greater than the turn-on voltage of the MOS tube, the MOS tube can be turned on.

beyond_笑谈

The maximum voltage between VG and S is defined in the MOSFET specification. D1 is a voltage clamp, which means that when the VSG voltage exceeds 12V, VSG is stabilized at 12V.