(Bonus 10) GD32L233 Review - SPI Driver DS1302

韵湖葱白

(Bonus 10) GD32L233 Review - SPI Driver DS1302 [Copy link]

 

## Preface Well-made architecture, high yield like a sow. Change the interface and the effect will come out. On the second day of work, I worked on the SPI driver DS1302. Keywords: GD32, SPI, DS1302, three-wire SPI, half-duplex SPI ## SPI Serial Peripheral Interface (SPI) provides data transmission and reception functions based on the SPI protocol, and can work in master or slave mode. The SPI interface supports full-duplex and simplex modes with hardware CRC calculation and verification. Some SPI ports also support SPI four-wire master mode. The conventional SPI signal description is as follows:  ## DS1302 DS1302 is a low-power real-time clock chip with trickle current charging capability launched by DALLAS, USA. It can time the year, month, day, week, hour, minute, and second, and has many functions such as leap year compensation. (Baidu Encyclopedia) DS1302 pin configuration:  DS1302 timing:  **You can see that except for the different CE high and low levels, this timing is the same as the half-duplex SPI. **  Register configuration of DS1302:  Clock frequency of DS1302:  ## Basic initialization of three-wire SPI driving DS1302 half-duplex SPI: - Single-wire send mode - Data 8 bits - Host mode - Clock idle low level, the first edge reads data - NSS Soft - Frequency division: According to the configuration of DS1302, generally more than 1M is more appropriate. - LSB Sending process: - Set to send mode - CE enable - Send address - Send data - CE disable Receiving process: - Set to send mode - CE enable - Send address - Set to receive mode - Wait for data reception to complete - CE disable - Switch to send mode, cut off SPI clock signal - Read data, wait for SPI to finish work## Simulating IO driver DS1302 Omitted (I have written it before, so I won’t post it) ## SPI driver DS1302 A small episode: SPI is generally AF5, but the SPI1 pins used are PB13, PB14, PB15, and they are AF6. I was fooled for 2 hours. It’s really ridiculous. **I hate debugging hardware. I really hope that chip manufacturers can have more design ideas from software engineers when designing hardware. ** SPI initialization: ``` #define DS1302_USING_SPI /* SPI0:PA5-SCK-SPI_SCK PA6-CE-SPI_MISO PA7-DATA-SPI_MOSI */ /* SPI1:PB13-SCK-SPI_SCK PB14-CE-SPI_MISO PB15-DATA-SPI_MOSI */ #define CURRENT_SPI SPI1 #define CURRENT_SPI_RCU RCU_SPI1 #define RTC_RCU RCU_GPIOB #define RTC_GPIO GPIOB #define RTC_SCK_PIN GPIO_PIN_13 #define RTC_CE_PIN GPIO_PIN_14 #define RTC_DATA_PIN GPIO_PIN_15 #ifdef DS1302_USING_SPI #define READ_MODE spi_disable(CU RRENT_SPI); \ spi_bidirectional_transfer_config(CURRENT_SPI, SPI_BIDIRECTIONAL_RECEIVE); \ spi_enable(CURRENT_SPI); #define WRITE_MODE spi_disable(CURRENT_SPI); \ spi_bidirectional_transfer_config(CURRENT_SPI, SPI_BIDIRECTIONAL_TRANSMIT); \ spi_enable(CURRENT_SPI); #define CE_HIGH gpio_bit_set(RTC_GPIO, RTC_CE_PIN); #define CE_LOW gpio_bit_reset(RTC_GPIO, RTC_CE_PIN); #else #endif void spi1_init(void) { spi_parameter_struct spi_init_struct; spi_i2s_deinit(CURRENT_SPI); rcu_periph_clock_en able(CURRENT_SPI_RCU); /* SPI_MOSI */ gpio_init_af_mode(RTC_RCU, RTC_GPIO, RTC_DATA_PIN, GPIO_OSPEED_50MHZ, GPIO_AF_6); /* SPI_SCK */ gpio_init_af_mode(RTC_RCU, RTC_GPIO, RTC_SCK_PIN, GPIO_OSPEED_50MHZ, GPIO_AF_6); /* RTC CE */ gpio_init_output_mode(RTC_RCU, RTC_GPIO, RTC_CE_PIN, GPIO_OSPEED_50MHZ, 0); CE_LOW; /* SPI parameter config */ spi_init_struct.trans_mode = SPI_TRANSMODE_BDTRANSMIT; spi_init_struct.device_mode = SPI_MASTER; spi_init_struct.frame_size = SPI_FRAMESIZE_8BIT; spi_init_struct.clock_polarity_phase = SPI_CK_PL_LOW_PH_1EDGE; spi_init_struct.nss = SPI_NSS_SOFT; spi_init_struct.prescale = SPI_PSC_16; spi_init_struct.endian = SPI_ENDIAN_LSB; spi_init(CURRENT_SPI, &spi_init_struct); /* enable */ spi_enable( CURRENT_SPI); } ``` DS1302 initialization: ``` # DS1302_UNLOCK write_ds1302(0x8e, 0x00); #define DS1302_LOCK write_ds1302(0x8e, 0x80); void rtc_time_init(void) { uint8_t hour; uint8_t hour_24 = 0; if define (read_ds1302(READ_FLAG_ADDR) != RTC_INIT_FLAG) { write_ds1302(0x84, hour_24); set_rtc(init_time); return; } hour = read_ds1302(0x85); if (hour > 0x80) { // Convert 12-hour clock to 24-hour clock hour_24 = (hour > 0xA0)?(hour&0x1F)|DEC2BCD(12):(hour&0x1F); write_ds1302(0x84, hour_24); } } ```` Read and write interface: ```` static void spi_rtc_send_byte(uint8_t byte) { /* loop while data register in not empty */ while(RESET == spi_i2s_flag_get(CURRENT_SPI, SPI_FLAG_TBE)); /* send byte through the SPI peripheral */ spi_i2s_data_transmit(CURRENT_SPI, byte); while(spi_i2s_flag_get(CURRENT_SPI, SPI_FLAG_TRANS)); } static void write_ds1302(uint8_t address, uint8_t data) { WRITE_MODE; CE_HIGH; spi_rtc_send_byte(address) ; spi_rtc_send_byte( data); CE_LOW; } static uint8_t read_ds1302(uint8_t address) { uint8_t data; /* send addr */ WRITE_MODE; CE_HIGH; spi_rtc_send_byte(address); /* recive data */ READ_MODE; while(RESET == spi_i2s_flag_get(CURRENT_SPI, SPI_FLAG_RBNE)); CE_LOW; WRITE_MODE; data = spi_i2s_data_receive(CURRENT_SPI); while(spi_i2s_flag_get(CURRENT_SPI, SPI_FLAG_TRANS)); return data; } void set_rtc(time_t t) { uint8_t year = t.year - YEAR_BASE; if(year >= 100) year = 0; DS1302_UNLOCK; /* Write with set time stamp*/ write_ds1302(WRITE_FLAG_ADDR, RTC_INIT_FLAG); write_ds1302(0x80, DEC2BCD(t.second)); write_ds1302(0x82, DEC2BCD(t.minute)); write_ds1302 (0x84, DEC2BCD(t.hour)); write_ds1302(0x86, DEC2BCD(t.day)); write_ds1302(0x88, DEC2BCD(t.month)); write_ds1302(0x8c, DEC2BCD(year)); write_ds1302(0x8a, DEC2BCD(t. week)); DS1302_LOCK; } time_t get_rtc(void) { time_t t; uint16_t year = read_ds1302(0x8d); uint8_t month = read_ds1302(0x89); uint8_t day = read_ds1302(0x87); uint8_t hour = read_ds1302(0x85); uint8_t minute = read_ds1302(0x83); uint8_t second = read_ds1302(0x81); uint8_t week = read_ds1302(0x8b); t.year = BCD2DEC(year) + YEAR_BASE; t.month = BCD2DEC(month); t.day = BCD2DEC(day); t.hour = BCD2DEC (hour); t.minute = BCD2DEC(minute); t.second = BCD2DEC(second); t.week = BCD2DEC(week); return t; } ``` ## Test results DS1302 week (register 0x8B) SPI Waveform:  Serial port data:   

Jacktang

The SPI driver DS1302 is introduced in detail, praise

The long sharp pulses along the rising and falling edges of CLK in the SPI waveform of the final test result are normal, right?

韵湖葱白

Jacktang posted on 2022-2-11 07:32 The introduction of SPI driver DS1302 is very detailed. I like it. The long sharp pulses on the rising and falling edges of CLK in the SPI waveform of the final test result are normal, right?

It's normal, there is no peripheral, it comes directly from Dupont line

韵湖葱白

List of all review articles:

(Bonus 1) GD32L233 Review - What is Cortex-M23?
(Extra 2) GD32L233 Evaluation - Development Environment Construction (Basic Framework + FreeRTOS + Compilation Passed)
(Extra 3) GD32L233 Evaluation - Unboxing and Showing Off the Big Box
(Extra 4) GD32L233 Evaluation - Obtaining and Printing the Main Frequency of System Resources
(Extra 5) GD32L233 Evaluation - CRC (with the clearest article explaining CRC in history)
(Extra 6) GD32L233 Evaluation - Random Numbers (with Software Random Number Generation Algorithm)
(Extra 7) GD32L233 Evaluation - FLASH Reading and Writing
(Extra 8) GD32L233 Evaluation - ADC and DMA (There is no official routine)
(Extra 9) GD32L233 Evaluation - DAC Waveform Generator (Triangle Wave, Square Wave, Sine Wave, Arbitrary Wave)
(Extra 10) GD32L233 Evaluation - SPI Driver DS1302
(Bonus 11) GD32L233 Review - PWM Driven Active Buzzer

yang_alex

The GPIO firmware in the GD32L223 official software support package does not have the following two functions!

gpio_init_af_mode(); gpio_init_output_mode();

Are you sure you are using GD32L223?

韵湖葱白

yang_alex posted on 2022-2-28 22:39 The GPIO firmware in the GD32L223 official software support package does not have the following two functions! gpio_init_af_mode(); ...

These two are encapsulated by me, which is the initialization of io

yang_alex

Why not use it directly? The original one is not easy to use. You need to set several PINs at a time. I guess you set one PIN at a time. Can you send it to me? I think there is something wrong with the SPI peripheral driver code of GD32. I also have a SPI read-only peripheral. I spent 2 days to recalculate it, but I set it to SPI_TRANSMODE_FULLDUPLEX duplex mode. Read-only mode doesn't work at all.

yang_alex

I feel your last picture is also weird. Is CE the chip select signal? How come the CE state changes, the clock signal is still running, and the data can still be read out?

韵湖葱白

yang_alex posted on 2022-3-1 17:20Why not use it directly? The original one is not easy to use. You need to set several PINs at a time. I guess you set one PIN at a time. Can you post it to see? It feels...

Sorry, I was on a business trip to Shenzhen for 2 weeks and just came back.

Actually, there is nothing special about it. It is just easier to use after encapsulation.

void gpio_init_af_mode(rcu_periph_enum rcu, uint32_t gpio, uint32_t pin, uint32_t speed, uint32_t af_func)
{
    rcu_periph_clock_enable(rcu);
    gpio_mode_set(gpio, GPIO_MODE_AF, GPIO_PUPD_NONE, pin);
    gpio_output_options_set(gpio, GPIO_OTYPE_PP, speed, pin);
    gpio_af_set(gpio, af_func, pin);
}

void gpio_init_input_mode(rcu_periph_enum rcu, uint32_t gpio, uint32_t pin)
{
    rcu_periph_clock_enable(rcu);
    gpio_mode_set(gpio, GPIO_MODE_INPUT, GPIO_PUPD_NONE, pin);
}

void gpio_init_output_mode(rcu_periph_enum rcu, uint32_t gpio, uint32_t pin, uint32_t speed, uint8_t set)
{
    rcu_periph_clock_enable(rcu);
    gpio_mode_set(gpio, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, pin);
    gpio_output_options_set(gpio, GPIO_OTYPE_PP, speed, pin);
    if (set)
    {
        gpio_bit_set(gpio, pin);
    }
    else
    {
        gpio_bit_reset(gpio, pin);
    }
}

韵湖葱白

yang_alex posted on 2022-3-1 17:23 I feel that your last picture is also weird. Is CE a chip select signal? How come the CE state changes, the clock signal is still running, and the data can still be read out?

That's normal.

If the chip performance is average, there will be a period of waiting before it ends.

That’s how I understand it.

I looked at the graph I saved when I tested stm32 F103 before, and there it is.

data = spi_i2s_data_receive(CURRENT_SPI);

while(spi_i2s_flag_get(CURRENT_SPI, SPI_FLAG_TRANS));

yang_alex

Yunhu Congbai posted on 2022-3-7 10:48 yang_alex posted on 2022-3-1 17:23 I think your last picture is also weird. Is CE a chip select signal? Why did the CE state change, the clock signal...

This logic is correct. I guess your screenshot was taken without waiting. I solved it this way. There must be something wrong with the SPI hardware logic of GD32.

韵湖葱白

yang_alex posted on 2022-3-7 22:44 This logic is correct. I guess your picture was taken without waiting. I solved it this way. There should be something wrong with the SPI hardware logic of GD32. ...

NO, waiting for timing is necessary, I always have it.

If there is no waiting time, something goes wrong.

My understanding is that a microcontroller with lower performance may have to wait longer, so a clock was introduced later.