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1. How to select signal conditioning devices before high-speed analog-to-digital conversion; how to solve the synchronization problem of multi-channel analog-to-digital conversion?
The most fundamental principle of signal conditioning before ADC is that the noise and error caused by signal conditioning should be within 1 LSB of ADC. Based on this purpose, you need to choose an op amp with appropriate indicators. As for the problem of multi-channel ADC synchronization, there is usually a chapter in the data sheet of high-speed ADC to introduce the problem of multi-chip synchronization. You can take a look at the introduction there.
2. How to determine the parameter of internal noise when selecting an ADC?
Generally, ADC has a parameter of signal-to-noise ratio (SNR) or signal-to-noise ratio (SINAD). SINAD = 6.02*effective number of bits + 1.76. You can use this formula to determine whether the ADC you choose can meet your requirements.
3. How to calibrate a pipeline ADC? What parameters need to be calibrated?
Generally speaking, the offset and gain error of ADC are relatively easy to calibrate. Just connect 0V and full scale for sampling, and then get the calibration coefficient. In addition, if temperature compensation is required, it is generally necessary to add a temperature sensor and then use a lookup table to compensate.
4. What are the suggestions for routing around ADC and DAC?
ADC and DAC are analog-digital hybrid devices. The most important thing to pay attention to during layout and routing is ground segmentation, that is, the processing of analog and digital grounds. For devices with high sampling rates, it is recommended to use one ground. For devices with low sampling rates, it is recommended to separate the analog and digital grounds and finally connect them together under the chip.
Other layout specifications are the same as those for other devices.
For specific devices, there is usually a layout diagram of the evaluation board for reference.
5. Is there any necessary connection between the accuracy and noise figure of the analog-to-digital converter?
The accuracy of low-speed analog-to-digital converters is expressed in terms of peak-to-peak resolution and effective value resolution. In the chip data of some ADI Sigma-delta ADCs, effective value resolution indicators under different conditions are listed. The accuracy of high-speed analog-to-digital converters can be expressed in terms of SNR and SNOB, which can also be found in the data.
However, the noise factor (NF) indicator is generally not included in the ADC specifications.
6. If an external analog switching switch is used, there will always be some resistance in this switch, which will inevitably cause some errors. So I would like to ask if there is any way to reduce these errors. Please describe the hardware method and the software method respectively.
You can choose a switch with very small resistance, such as the ADG14** series. If the switch is used for channel switching, just add an op amp follower in the later stage. If it is used for range switching, only switches with very small resistance can be selected, and attention should be paid to the flatness and temperature drift parameters of the switch. If the system accuracy requirements are very high, only software correction can be performed or programmable amplifiers such as AD8250/1/3 can be selected.
7. After short-circuiting the input terminal of AD7710 with its own ground, when reading the data again, the AD conversion value jumps greatly. The problem has not been solved through several calibration methods in the instructions. The frequency is already at 25Hz. I don't know how to solve it?
Please confirm the stability of the power supply and reference. Under the conditions of frequency of 25Hz and gain of 1, the effective value resolution is 21.5bit according to the data in Table II. Then the actual peak-to-peak resolution is 21.5-2.7=18.8bit, which means that it is normal if there are 5-bit codes jumping.
8. How to eliminate the interference of the sensor output signal when the ADC input is connected to the sensor?
If the sensor output is common mode interference, it is necessary to add an instrument amplifier such as AD8221/0 to filter it out. If it is differential mode interference, it can be filtered out by adding a filter.
9. I want to design a 16-channel data acquisition system, and the sampling rate of each channel is 100K, 16BIT. What kind of AD chip should I use? In addition, the AD converter has relatively few input channels. What kind of external multi-channel analog switching switch should I choose? In addition, what are the requirements for the selection of analog switching switches, and what parameters should be paid attention to?
We do not have 16-bit and 16-channel ADCs. You can choose to use two AD7689s, 16-bit 8-channels. Or choose the 16:1 ADG1206. Pay attention to the on-resistance, injected charge, on-time, etc.
10. Can a 12-bit high-speed analog-to-digital converter be reduced to 8 bits and how can it be reduced to 8 bits for use? Because our system accuracy only requires 8 bits, and any higher accuracy will be harmful.
When you read data, you only need to read 8 bits.
11.Some ADCs have integrated anti-aliasing filters. What are the benefits?
Generally, the anti-aliasing filter refers to the filter at the front end of the ADC, while the sigma-delta ADC has some notch filters integrated inside to achieve 50Hz and 60Hz power frequency notches. The overall benefit is that the ADC has better anti-noise performance.
12.How can we reduce the interference between adjacent channels?
When laying out the wiring, you can consider adding ground shielding between adjacent channels.
13. I want to design a high-precision calibration instrument, such as DC voltage output (millivolt level). Can you recommend a few chips? How to eliminate the accompanying quantization noise? How to ensure the accuracy of ADC? The full scale of AD conversion is the power supply voltage. For single power supply, the determination of zero point and range are related to the power supply voltage. If the power supply voltage fluctuates, it will inevitably lead to conversion errors. How to solve it in the circuit, especially for the collection of small signals. What is the output static error of DAC? How to improve the matching degree of resistors or current source units in digital-to-analog converters? When powering the ADC, is it necessary to connect a small inductor in series between the digital ground and the analog ground?
1) ADI has many types of op amps and instrument amplifiers. It is best to list the detailed specification requirements so that it is easier to find.
2) The quantization noise of the ADC is inherent and cannot be eliminated.
3) The power supply of ADC has a direct impact on the measurement accuracy. Therefore, it is necessary to select a high-precision and low-noise power supply signal, and also pay attention to avoid interference during wiring.
4) Generally, manuals will give zero error, gain error, etc. separately. I don’t know which one you are asking about, or can you give an example of a specific model.
5) This should be a problem with the internal structure of the DAC. Generally speaking, we do not care about the absolute value of the internal resistance or current source, but only the ratio between them. The current technology can guarantee this well.
6) Generally speaking, a 0 ohm resistor is sufficient.
14.The greater the internal gain of an ADC, the greater the noise it generates. Can experts explain the principle behind the two?
The greater the PGA gain inside the ADC, the greater the noise of the PGA itself, and the more the ADC input noise is amplified. Therefore, the greater the internal gain of the ADC, the smaller the resolution.
15.What is the impact of power supply ripple on conversion accuracy?
If the ADC has a PSRR indicator, you can use this indicator to calculate the impact of power supply ripple on the ADC. If not, the reference source generally has this indicator, and you can use the PSRR of the reference source to calculate the impact on ADC sampling.
16.How are data converters designed in terms of wiring length, communication crosstalk, and matching resistance?
High-speed ADCs will take these issues into consideration. Especially for ADCs with LVDS interfaces, try to ensure that the wiring of a pair of signals is of equal length and distance, and place termination resistors. The best way to do this is to refer to the evaluation board.
17.What is the maximum speed of ADI's high-speed digital-to-analog conversion? Will the stability decrease if the sampling frequency is increased?
The maximum speed of our DAC can reach 2.5GHZ, it is AD9739 current output type, which will not affect the stability.
18. The nominal number of bits of an ADC is very high, but in practice the last few bits will be drowned out by internal noise. How do I determine the internal noise parameter when selecting an ADC?
For high-precision ADCs, an effective resolution parameter is generally given, which is the number of bits that the device can achieve without code skipping. In addition, the noise of the power supply and reference voltage, as well as the noise introduced by the ADC front-end conditioning circuit, must also be considered in the design. These noises need to be controlled within 1 LSB of the ADC.
19. When evaluating ADC, it is difficult to evaluate SNR, so I usually consider evaluating the degree of code hopping when grounding to compare the difference between two similar ADCs. Is this evaluation method scientific? Is there a more scientific method? Is there any specific document?
In fact, for high-speed ADCs, you should add a high-precision reference signal, then use the ADC to sample, and then do FFT analysis to evaluate SNR. For high-precision ADCs, this is the method you should use. You can refer to our application note AN-835.
20. How do you understand the slew rate indicator? Why is there a limit on the voltage change rate?
To give a simple example, if the slew rate is not enough, the actual output will not be able to keep up with the changes in the input signal, so the signal processing will be distorted.
21. How much influence does the ripple of the switching power supply have on ADCs above 12 bits? Is it necessary to process the power supply ripple separately for the ADC part?
It is not recommended to use a switching power supply to power high-precision ADCs, such as 16-bit and above ADCs.
22. Will using a high-efficiency switching regulator to replace the traditional LDO regulator power supply have any negative impact on the high-speed analog-to-digital converter? What is the impact on the product life?
In high-speed ADC applications, there are generally higher requirements for power supply ripple and noise. Switching power supplies are more efficient, but have larger ripple and noise, which will affect the accuracy of the system. High-speed applications have higher requirements for SNR and SFDR, so it is better to choose LDO.
23. What should we pay attention to when designing impedance matching of operational amplifiers?
Impedance matching only needs to be considered in high-speed situations. There is software online that can directly help you calculate impedance matching.
24.Will the power supply accuracy lead to the inability to improve the ADC accuracy?
It is possible. It depends on the number of bits of your ADC and the parameter PSRR. If the number of bits is very low, such as 10 bits, you can only achieve 10-bit accuracy even if you use a low-noise power supply. However, for a 16-bit system, if you use a power supply with a lot of noise, the system accuracy will not reach 16 bits.
25. What kind of performance indicators should the pre-AD anti-RF interference filter generally achieve, such as cut-off frequency and roll-off?
This depends on your actual application. Of course, ideally the cut-off frequency is equal to the effective input signal, and the roll-off characteristic is infinitely steep, but in reality there is no such filter, and the closer to the ideal situation, the higher the cost, so it is a compromise.
26. How to suppress input "glitch"?
Add filter suppression, or perform digital filtering on the sampling results.
27. What are some good suggestions for using software to improve the accuracy and number of bits of ADC?
Pay attention to the quality of the reference and power supplies, and also pay attention to the layout to prevent noise introduction.
28. What is the required resolution for AD conversion of ECG signals? Can you recommend some models?
It depends on the ECG signal chain. If the signal chain is AC isolated, the signal can be amplified greatly, such as 1000 times, so the ADC is selected to be 12-bit to 16-bit. If the signal chain is DC isolated, the signal cannot be amplified much, and the general gain is 10, so the ADC bit number must be larger, 18-bit to 24-bit.
ECG products have corresponding standards, that is, how small a signal the ECG product can distinguish at least, and the selection of ADC is also related to this.
29. I designed an FPGA-based DDS system that uses the AD9777 chip. If the current is sufficient, can the DA chip and the FPGA chip share the 3.3V digital power supply in the system power supply design to simplify the power supply design?
Can.
30. As digital video signals become more and more popular, will digital-to-analog converters become useless or even eliminated in video applications?
Digital-to-analog converters will never be eliminated because they ultimately need to convert digital signals into analog signals that people can recognize.
31.How to design the power supply of ADC in harsh environment (high temperature)? Generally, it is difficult for DC-DC to reach +85 degrees Celsius. Does ADI have any relevant reference design?
Choose the right device, DC-DC can work at 85 degrees. The key is to choose the right device and the right design so that the temperature rise of the system is within its calibrated range, such as adding a fan or heat sink, connecting multiple devices in parallel to improve power efficiency, etc.
32.When I use the A/D of ADuC841, the collected data is occasionally zero. Why? How to solve it?
In this case, you need to use an oscilloscope to monitor the input signal to see if the input terminal actually jumps. If not, please carefully check the data reading program of ADUC841.
33. When a DC signal is added to the input of the converter, how do you determine the number of digital numbers that should appear at the output?
Generally speaking, according to the calculation formula, Vin/Vref=code/2^N. N is the number of bits of the ADC, Vin is the input voltage, and Vref is the reference voltage. If there is a negative voltage, the type of output codeword needs to be considered, such as two's complement, etc. Most ADC data sheets will give a diagram to illustrate this problem.
34. When using AD7710, the noise is too high. How to use the calibration in the manual? What is the appropriate way to do it during the wiring process?
It is recommended to refer to the chip evaluation board for layout design.
35. How can we minimize the impact of system noise on ADC?
Minimize input noise (ADC with differential input), reduce power supply noise, design appropriate filters, etc.
36. How do you determine the effect of temperature on the reference and the resulting conversion accuracy?
The reference chip data will contain a temperature coefficient indicator of the effect of the relevant temperature on the reference, which is usually a few ppm/°C.
Generally, ADC chip data does not contain test parameters for the effect of temperature changes on ADC performance.
37.How to implement THD test for high-speed ADC?
In practice, a high-precision reference source is added, then sampled with an ADC, and then FFT analysis is performed. For details, please see the introduction above in AN-835.
38. Is there any way to reduce the effect of switching power supply noise on ADC?
Add LC filtering and reasonable layout such as separating analog and digital grounds. If that still doesn’t work, you can only add a low-noise LDO.
39. If the linearity of the ADC transfer function is poor, how to calibrate it? Is there a scientific method that has been verified? Can you give an example?
Generally, linear correction is performed. If the requirements cannot be met after correction, it is recommended to use the segmented correction method.
40.Differential mode has many advantages over single-ended mode, but there are still many single-ended ADCs. Are there any weaknesses in differential mode?
Compared with single-ended input, the peripheral circuit is relatively complicated.
41. In the design of high-speed data acquisition system, how do we determine the sampling rate and memory bandwidth?
The sampling rate is determined by the frequency of the signal to be processed. The memory bandwidth is determined by the sampling rate and the processor power.
42. What kind of performance indicators should the anti-RF interference filter before AD generally achieve?
It depends on your application. Ideally, you would only let signals within the effective bandwidth pass, but it is difficult to achieve ideal filter design, so compromises must be made.
43. If you want to convert video signals to digital-to-analog or analog-to-digital, how do you choose a converter? What are its key specifications?
It mainly depends on the video signal format you need to convert, whether color space conversion is required, whether it is a normal parallel port or an HDMI port.
44.What factors mainly affect the output delay of ADC?
This is determined by the internal parameters of the ADC, and the specific details depend on the data sheet of different models.
45.How to reduce truncation error and gain error?
For a specific ADC, its offset error and gain error are basically certain, but they can be eliminated through software correction.
46. There are always error codes in the collected data. What methods can be used to eliminate these error codes?
First, we need to determine whether the error code is an ADC output error or an MCU reading error. If it is the former, it depends on whether the system design and layout are reasonable.
47.Does the switching power supply ground need to be separated from the ADC analog ground?
Connecting the analog ground of the ADC to the ground of the output filter capacitor of the switching power supply through a point will reduce the impact of power supply ripple on the ADC.
48.What does PSRR index mean?
Refers to the power supply voltage rejection ratio.
49. I recently evaluated a dual-supply ADC. I grounded the input of the converter under test and observed the output digital on the LED indicator. I was very surprised that the output digital range I observed was not the one I expected.
There are many reasons that may cause this problem: the range of the input signal source, the value of the reference voltage source, the influence of noise, etc.
50.Why can’t the quantization noise of ADC be eliminated?
Because sampling is not an ideal, but an infinitely approximate concept.
51. In practical applications, which indicator, INL or DNL, is more meaningful to users?
Both indicators are important.
52. What should be the final connection method between analog ground and digital ground?
Try to separate the analog ground and digital ground to avoid mutual interference. However, in high-speed ADC applications, digital and analog grounds are required to share a common ground.
53. I need to install a space-saving data converter and I think a serial converter is more suitable. What do I need to know in order to select and use this converter?
The conversion speed of the ADC with serial interface is generally low, below 10M, but it is convenient to package and read. You can first check the number of bits you need to see if a speed below 10M can meet your requirements. Another key point is the interface between MCU and ADC, whether to use the simulated SPI or the standard SPI interface of MCU.
54. What are the requirements for the AD clock signal? Is it necessary to make some compensation for temperature and jitter?
No compensation is needed. The ADC has already done the relevant compensation internally.
55. For a single board structure, if there are multiple ADCs on the board, for example, 9, does this lecture recommend that the ADCs be connected across the analog ground and digital ground? Does it mean that multiple grounding points are required?
The ADC needs to be connected to the analog part of the system.
56. When to use FPBW and when to use small signal BW, the data sheet does not tell us all the situations.
FPBW is related to the chip's Slew Rate. When amplifying a signal, if the Slew Rate cannot keep up, the output signal will be distorted. FPBW = SlewRate/2piVp, where Vp is the voltage of the output signal.
57. I would like to ask the experts, when using R and C isolation, if R is too large, it will affect the subsequent ADC, and if C is too large, it will affect the phase. How should I choose in the specific design?
You can consider adding an op amp as a buffer after the RC filter.
58.What are the most common errors in data converters? How to avoid them?
ADC conversion will be affected by noise. If the ADC conversion result is roughly equal to the theoretical value, a more accurate value can be obtained by reading the conversion results multiple times on the same input voltage and averaging the conversion results.
59. We need a bandwidth of 100 Hz, but the amplifier we use has a bandwidth of 1 kHz. How can we effectively solve the anti-interference problem?
Generally speaking, a filter needs to be added to the front end of the ADC to filter out the noise outside the useful bandwidth.
60.What are the important parameters that affect ADC? How to avoid them in PCB design?
Consider the design of the anti-aliasing filter at the front end of the ADC, impedance matching, and input and output impedance.
61. In high-speed analog-to-digital conversion, can we not use the internal reference voltage of the chip as the reference? We need an external reference. Is it possible for the internal reference voltage of the chip to be as stable as the general external reference?
When using an internal reference voltage, the reference voltage will sink/source current during ADC conversion, which will affect the ADC's power supply voltage and thus affect the ADC's SNR. External references are often used in situations where system accuracy requirements are very high.
62. Among the current ADC chips of ADI, what is the maximum speed that can be achieved if the resolution is higher than 14 bits? What is the maximum speed that can be achieved if the resolution is higher than 14 bits for dual channels?
The maximum speed of 14-bit ADC is 150MSPS. You can search it at the following website: http://www.analog.com/dynamic/pathLine=ADC&la=en
63. What problems will the discontinuous transfer function (DNL discontinuity) cause? If I encounter this problem in the application, how should I deal with it? Use software compensation? If it is discontinuous, why can't the chip do compensation from a hardware perspective?
Discontinuous DNL will cause code loss. This problem cannot be compensated externally. This is the characteristic of the ADC itself. ADI's ADCs are guaranteed to have no code loss problem.
64. How big is the impact of the switching power supply on data conversion errors? What is the most reasonable frequency recommendation for the switching power supply?
You can add LDO or LC filter to reduce power supply ripple and noise. Generally, the PSRR of ADC is relatively high. ADC with low bit number, such as 10bit, does not require high power supply, but ADC with high bit number, such as 16bit, requires high switching power supply. The switching power supply frequency selection is related to power and efficiency. The common switching frequency is generally selected as 100KHz-300KHz.
65. From the perspective of signal-to-noise ratio, to realize multi-channel AD, is it better to use a single multi-channel AD chip? Or is it better to use multiple single-channel ADs?
The effect will be better if multiple ADC chips are used, because single-chip multi-channel chips will have interference between channels.
66. How to determine whether the conversion error is caused by interference signals or the conversion itself?
For high frequencies, a high-precision reference source is required. For high-precision, the input terminal can be short-circuited to test the noise characteristics of the ADC itself.
67. To reduce high frequency interference, is it beneficial to use an LDO after a switching regulator?
You can choose a low noise LDO.
68.Which type of A/D should pay special attention to the suppression of electromagnetic interference when wiring? What good suggestions are there?
Generally speaking, ADC does not need to consider this, but consider electromagnetic interference suppression at the power supply end. If high-speed digital devices or clocks are used, you can consider adding a shielding cover.
69.What is the difference between a notch filter and an anti-aliasing filter?
A notch filter is a filter that attenuates interference at a certain frequency sufficiently and can be understood as a band-stop filter, while an anti-aliasing filter can be understood as a low-pass filter.
70. Will noise aliasing cause the SNR of the ADC to degrade?
Aliasing is caused by the signal frequency being less than 2 times the sampling rate, which makes the design of the filter difficult, making it difficult to filter out the noise and affecting the SNR.
71. What is the impact on EMC performance when the ADC power supply is changed from LDO to switching power supply?
This depends on the EMC treatment of your switching power supply. If the switching power supply EMC/I is not well treated, the system will have EMI/C problems. Changing from LDO to switching power supply to power the ADC may affect the accuracy of the ADC.
72. If you are measuring a very low frequency analog signal (less than 10 Hz), which method will have higher measurement accuracy, direct single-ended measurement or converting the signal into a differential signal and then driving the ADC?
You can just do a single-ended measurement.
73. Is the A/D timing control in pulse mode complicated? Is it implemented inside the A/D?
For the user side, the CPU is used to control the communication interface of the ADC, which is not complicated.
74.How can we minimize the AC loop to eliminate noise interference?
When laying out the wiring, try to consider the return path of the signal line to make the loop area as small as possible.
75. I want to use a 16-bit high-speed ADC in a project, but the noise of the front-end analog signal itself is relatively large, which will waste 3 to 4 bits of accuracy. Do you think it is necessary to choose a 16-bit ADC?
If the input signal itself has only 12 bits of noise and the noise cannot be reduced through processing, then do not use a 16-bit ADC.
76. Generally, there are many analog power pins on the ADC package. For example, AD7656 has 8 AVcc. When designing the PCB, how do you connect them to the power supply?
It is best to have a power plane and connect AVCC to the power supply nearby, paying attention to the distribution of capacitors. It is recommended to use AD7656-1 for new designs. Compared with AD7656, -1 requires less capacitors on the power pin.
77. Can experts recommend some Rail-to-Rail high-precision operational amplifiers with low temperature drift?
AD8628, AD8638
78. Many current systems are powered by a single switching power supply. So how should the digital power supply, analog power supply, digital ground, and analog ground of the ADC and DAC in the system be handled?
The digital power supply can be led out from the analog power supply through a ferrite bead. If allowed, try to use separate power chips to power the analog and digital power supplies.
79. Some ADCs add a high-frequency jitter source to the clock input. Can this increase the effective number of bits of the ADC?
It can be powered by a single power supply, but please note that the Reference of AD620 needs to be connected to 0.5 of the power supply voltage.
80.How can we avoid signal loss during sampling?
It can only be done by increasing the sampling rate or filtering.
81. How to distinguish whether the interference comes from the front end or the power supply?
For high-precision applications, the input can be short-circuited to measure the output. If the interference remains unchanged, it should be caused by the power supply and reference.
82.Is there any difference between high-speed ADC and low-speed ADC in dealing with interference?
The same thing is to add decoupling capacitors to eliminate interference. The layout may be slightly different. High-speed ADCs generally sample the ground plane and are grounded nearby. Low-speed ADCs generally separate the digital and analog grounds and use a single ground.
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