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120V Boost 4A Peak Current High Frequency High-Side/Low-Side Driver [Copy link]

The UCC27210 and UCC27211 drivers are based on the popular UCC27200 and UCC27201 MOSFET drivers, but with significantly improved performance. Peak output pull-up and pull-down currents have been increased to 4A source and 4A sink, and the pull-up and pull-down resistances have been reduced to 0.9Ω, so that high power MOSFETs can be driven with minimal switching losses during the MOSFET's Miller effect plateau transition. The input structure is now capable of handling -10 VDC directly, which improves robustness and allows direct interface to gate drive transformers without the need for rectifier diodes. The inputs are independent of the supply voltage and have a maximum rating of 20V.

The switch node (HS pin) of the UCC2721x can handle voltages up to -18V, protecting the high-side channel from negative voltages inherent in parasitic inductance and stray capacitance. Hysteresis has been added to the UCC27210 (pseudo-CMOS input) and UCC27211 (TTL input) to provide enhanced noise immunity for interfacing with analog or digital pulse-width modulation (PWM) controllers.

The low-side and high-side gate drivers are independently controlled and delay matched to 2ns between their turn-on and turn-off.

Since a 120V rated bootstrap diode is integrated on chip, no external discrete diode is required. Both high-side and low-side drivers are equipped with undervoltage lockout function, which provides symmetrical turn-on and turn-off behavior and can force the output low when the driving voltage falls below a specified threshold.

Features
Two N-channel MOSFETs in high-side/low-side configuration can be driven from independent inputsMaximum boot voltage120V
DC4A
sink, 4A source output current0.9Ω
pull-up and pull-down resistors
Input pins are -10V to 20V tolerant and independent of supply voltage range
TTL or pseudo-CMOS compatible input versions8V
to 17V VDD operating range (20V absolute maximum)
7.2ns rise time and 5.5ns fall time (with 1000pF load)
Short propagation delay time (18ns typical)
2ns delay matching
Symmetrical undervoltage lockout for high-side and low-side drivers
Available in all industry standard packages (SOIC-8, PowerPADSOIC-8, 4mm × 4mm SON-8, and 4mm × 4mm SON-10)
-40℃ to 140℃ Rated temperature range
Applications
Power supplies for telecom, datacom and commercial applications
Half-bridge and full-bridge converters
Push-pull converters
High voltage synchronous buck converters
Two-switch forward converters
Active clamp forward converters
Class D audio amplifiers

UCC2721x 120-V Boost, 4-A Peak Current, High-Frequency High-Side/Low-Side Drivers datasheet (Rev. F)

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This post is from Analogue and Mixed Signal

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The level of domestic half-bridge drivers has also improved.   Details Published on 2020-3-1 12:59

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High current gate drivers , which can help improve overall system efficiency by reducing switching losses. Switching losses occur when a FET switch is turned on or off. In order to turn on the FET, the charge on the gate capacitor must exceed the threshold voltage. The gate driver's drive current can help charge the gate capacitor. The higher the drive current capability, the faster the capacitor can be charged and discharged. The ability to source and sink large amounts of charge reduces power losses and distortion. (Conduction losses are another type of FET switching loss, which is determined by the internal resistance or R DS(on) value of the FET, where the FET also dissipates power as current passes through it.)

In other words, the goal is to reduce the switching transition times within systems that require high-frequency power conversion. The gate driver specifications that highlight this type of performance are the rise and fall times. See Figure 1.

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Figure 1 : Typical rise and fall time graph

If you want to go a step further, gate driver features such as delay matching can effectively double the drive current capability. Delay matching refers to the matching of the internal propagation delays between the two channels, which can be achieved by paralleling the outputs of a dual-channel gate driver or by tying the two channels together. For example, TI's UCC27524A has extremely accurate 1ns (typical) delay matching, which can increase the drive current from 5A to 10A.

Figure 2 shows an example of combining the A and B channels of the UCC27524A into one driver. The INA and INB inputs and the OUTA and OUTB are in series. The parallel combination is controlled by a single signal.

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Figure 2 : Connecting the UCC27524A in series to double the dual-drive current capability

One of the results of improved system efficiency is the increase in power density. In applications such as power factor correction (PFC) and synchronous rectification blocks of isolated power supplies, DC/DC modules, and solar inverters, designers are constrained to achieve the same output power with the same size (or smaller size), so the demand for higher power density has become a trend.

TI’s product portfolio includes gate drivers with high current, fast rise and fall times, and delay matching. See Table 1.

Classification

equipment

describe

Rise / Fall Time

Delay Matching

High current driver

UCC27714

4A , 600V high-side and low-side drivers

15ns , 15ns

support

UCC27524A

5A , high speed low side dual driver

7ns , 6ns

support

UCC27211A

4A , 120V High-Side and Low-Side Drivers

7.2ns , 5.5ns

support

Table 1 : High current gate drivers

This post is from Analogue and Mixed Signal
 
 
 

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The level of domestic half-bridge drivers has also improved.

This post is from Analogue and Mixed Signal
 
 
 

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