Share practical tips on eliminating EMI in buck converters!

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Share practical tips on eliminating EMI in buck converters! [Copy link]

 

It is a big challenge to eliminate EMI problems in switch-mode power converters because they contain many high-frequency components. Parasitic components in electronic components often play an important role, so their performance is often very different from what expected. This article provides a very basic analysis of EMI problems in low-voltage Buck converters, and then provides very practical solutions to solve these problems, which is very valuable for reference. 1. Overview When designing switch-mode converters, electromagnetic compatibility issues are usually encountered only during the testing phase after the design is completed. If electromagnetic compatibility issues are not considered in the first stage of design, it will be difficult and expensive to reduce their impact in the final stage. Therefore, in order to ensure a smooth product design process and to obtain the most optimized design, it is best to start considering this issue at the beginning of the design. Among all the factors to be considered, component selection and PCB layout design are the key to achieving the best EMI performance. 2. EMI sources in converters There are two types of radiation sources that cause EMI problems: alternating electric fields (high resistance) and alternating magnetic fields (low resistance). Non-isolated DC/DC converters have nodes and loops with very low impedance (much lower than the impedance of free space, 377Ω, which is the product of the vacuum magnetic permeability μ. and the speed of light C. in a vacuum, also known as the intrinsic impedance of free space). Therefore, the main radiation source in a Buck architecture DC/DC converter is usually the magnetic field. Magnetic field radiation is formed by high-frequency currents in small current loops. The high-frequency magnetic field generated by the current loop will gradually convert into an electromagnetic field after leaving the loop for about 0.16λ. The resulting field strength is approximately:

For example, for a 1cm2 current loop with a current of 1mA and a current variation frequency of 100MHz, the field strength at a distance of 3m from the current loop is 4.4μV/m, or 12.9dBμV. Figure 1 below shows the relationship between the radiation intensity and the current variation frequency formed by a 1cm2 current loop with a current of 1mA flowing through it. The green line in the figure is the radiation intensity threshold allowed by the standard at a distance of 3m.

As can be seen from the figure, the radiation generated by a 1mA current in a 1cm2 loop is not likely to exceed the specification limit. In reality, the reason for the excessive radiation is often that the loop that should be minimized becomes a large loop, or the wire attached to the line forms excess radiation. The antenna effect formed by these large loops or wires will play a major role in the total radiation.

3. Current loop in the converter There are two main loops in the Buck architecture DC/DC converter where the current changes dramatically. When the upper bridge MOSFET Q1 is turned on, the current flows out from the power supply, enters the output capacitor and the load after passing through Q1 and L1, and then flows back to the power input terminal through the ground wire. In this process, the alternating component in the current will flow through the input capacitor and the output capacitor. The current path mentioned here is shown as the red line in Figure 2, which is marked as I1. When Q1 is turned off, the inductor current will continue to flow in the original direction, and the synchronous rectifier switch MOSFET Q2 will be turned on at this time. The current at this time flows through Q2, L1, the output capacitor and returns to Q2 through the ground wire. The loop is shown as the blue line in Figure 2, which is marked as I2. The currents I1 and I2 are both discontinuous, which means that they have steep rising and falling edges when switching. These steep rising and falling edges have extremely short rising and falling times, so there is a high current change rate dI/dt, which must contain many high-frequency components.

In the above loop, the current loops I1 and I2 share the path from the switch node → inductor → output capacitor → ground → source of Q2. When I1 and I2 are combined, a relatively smooth, continuous sawtooth waveform is formed. Since there is no edge with extremely high current change rate dI/dt, it contains fewer high-frequency components. From the perspective of electromagnetic radiation, the shaded A1 area in Figure 3 is the loop part with high current change rate dI/dt. This loop will generate the most high-frequency components, so it is the most critical part that needs to be considered in the EMI design of the Buck converter. The current change rate dI/dt in area A2 of the figure is not as high as that in area A1, so the high-frequency noise generated is relatively small.

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When designing the PCB layout of a Buck converter, the area of area A1 should be designed to be as small as possible. For this, please refer to the practical points of PCB layout design in Chapter 7. 4. Input and output filtering Ideally, the input and output capacitors have extremely low impedance to the switching current of the Buck converter. But in reality, capacitors have ESR and ESL, which increase the impedance of the capacitor and cause additional high-frequency voltage drops on it. This voltage drop will cause corresponding current changes in the power supply line and the load connection circuit, as shown in Figure 4.

Due to the discontinuous nature of the Buck converter input current and the long power lines that actually power the converter, the radiation caused by the input loop A3 may also be considerable and may result in conducted emissions that exceed the specifications (in the 150kHz~30MHz frequency band) and fail the electromagnetic compatibility (EMC) conducted test inspection. To reduce the voltage drop caused by the input capacitor CIN, a variety of low ESR MLCC capacitors of different sizes can be placed close to the Buck IC, for example, a 2×10μF in a 1206 package and a 22nF~100nF capacitor in a 0603 or 0402 package can be used in combination. To reduce the noise in the input loop, it is strongly recommended to add an additional LC filter on the input line. When using pure inductance as L2, it is necessary to add electrolytic capacitor C3 to suppress the ringing signal that may appear at the power input end and ensure the stability of the input power supply. In order to filter the output, MLCC capacitors of various sizes should also be used as output capacitor Cout. Small-sized 0603 or 0402 capacitors of 22nF~100nF can effectively prevent high-frequency noise from the switching node from coupling to the output end through the parasitic capacitance of inductor L1. Additional high-frequency magnetic beads can prevent the output loop from becoming an effective loop antenna, but it should be noted that this method may deteriorate the load transient response characteristics and load adjustment characteristics of the converter. If the load in the application has strict requirements in this regard, do not use magnetic beads. You can directly place the converter as close to the load as possible and minimize the loop area by optimizing the layout of copper foil.

5. Reduce the switching speed of the converter

If the radiation level of a Buck converter circuit cannot be lowered below the required level through optimization of PCB layout and filter design, then we can only think of ways to reduce the switching speed of the converter, which is very helpful in reducing its radiation level.

In order to understand how much improvement this can lead to, we need to discuss the high-frequency components of discontinuous current pulses. The left side of Figure 6 shows a current waveform simplified to a trapezoid, with a period of TPERIOD, a pulse width of TW, and a pulse rise/fall time of TRISE. From the frequency domain, this signal contains fundamental frequency components and many high-order harmonic components. Through Fourier analysis, we can know the relationship between the amplitude of these high-frequency components and the pulse width and rise/fall time. This relationship is shown on the right side of Figure 6.

The frequency values in Figure 6 are based on a switching signal with a frequency of 800kHz, a pulse width of 320ns, and a rise/fall time of 10ns.

EMI radiation problems often occur in the frequency band of 50MHz~300MHz. By increasing the rise and fall times, the position of fR can be moved toward low frequencies, and the strength of higher frequency signals will decrease rapidly at a rate of 40dB/dec, thereby improving their radiation conditions. In the low frequency band, the improvement caused by lower rise and fall speeds is very limited.

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Adding a series resistor to the bootstrap circuit The rise time of the switching waveform depends on the turn-on speed of the upper MOSFET Q1. Q1 is driven by a floating driver, which is powered by the bootstrap capacitor Cboot. In an integrated Buck converter, Cboot is powered by an internal regulator, and its voltage is usually 4V~5V. See the left side of Figure 7. The rise time of the Buck converter switching waveform and current pulse can be increased by reducing the turn-on speed of the upper MOSFET switch. This can be achieved by adding a series resistor Rboot to Cboot, as shown in Figure 7. The value of Rboot is related to the size of the upper MOSFET. For most applications, 5~10Ω is sufficient. For smaller MOSFETs, they have higher Rdson, and larger Rboot values are acceptable. In high duty cycle applications, too large Rboot values may result in insufficient charging of Cboot and even in instability of the current sensing circuit. In addition, the slower MOSFET turn-on speed will also increase switching losses, resulting in reduced efficiency. In designs where the MOSFET is external, a resistor can be connected in series to the gate of the high-side MOSFET, which can increase both the on-time and off-time of the high-side. When the high-side MOSFET Q1 is turned off, the inductor current charges the parasitic output capacitance of Q1 and discharges the parasitic output capacitance of Q2 until the switch node potential becomes lower than the ground potential and turns on the body diode of Q2. Therefore, the fall time is basically determined by the inductor peak current and the total parasitic capacitance on the switch node. Figure 8 shows the parasitic components in a conventional buck converter IC.

These parasitic capacitances are composed of the Coss of the MOSFET and the capacitance relative to the substrate. In addition, there is a parasitic inductance on the connection line from the IC pin to the wafer core. These parasitic components and the parasitic inductance caused by the PCB layout together with the ESL on the input filter capacitor will cause high-frequency ringing signals on the switching waveform. When MOSFET Q1 is turned on, the ringing signal on the rising edge of the switch node signal is mainly caused by the Coss of Q2 and the total parasitic inductance (LpVIN + LpGND + LpLAYOUT + ESLCIN) on the MOSFET switch switching path. When MOSFET Q1 is turned off, the ringing signal on the falling edge of the switch node signal is mainly caused by the Coss of Q1 and the parasitic inductance (LpGND) between the source of the lower bridge MOSFET and the ground. Figure 9 shows a switch node waveform with fast rise and fall times, with ringing on both the rising and falling edges. The amplitude of the ringing will increase with increasing load current, as the energy stored in the parasitic inductance is equal to I2Lp. The frequency range of this signal is usually between 200 and 400MHz, which can cause high-frequency EMI radiation. Excessive ringing usually indicates large parasitic inductance, indicating that the PCB layout design needs to be checked and corrected to correct large loops or too narrow VIN and/or ground lines. The packaging of the component will also affect the ringing condition. Wire bonded packages will have larger parasitic inductance than flip-chip packages because the inductance of the bond wires is greater than the inductance of the solder joints, which will perform worse. RC Snubber Suppression Circuit Adding an RC snubber circuit can effectively suppress the ringing phenomenon, but it will also increase the switching loss. The RC snubber circuit should be placed close to the switch node and the power ground. In a buck converter using an external MOSFET switch, the RC snubber circuit should be placed directly across the drain and source of the low-side MOSFET. Figure 10 shows the placement of the RC snubber circuit.

The role of the snubber resistor Rs is to provide sufficient suppression of the oscillation process of the parasitic LC oscillation circuit. Its value depends on the desired suppression strength and the parameters of the L and C parasitic components, and can be determined by the following formula: Where, ξ is the suppression factor. Usually, the value of ξ is between 0.5 (slight suppression) and 1 (heavy suppression). The values of the parasitic parameters Lp and Cp are usually unknown, but can be measured by the following method: Measure the frequency fRING of the original ringing signal at the rising edge of the signal. Add a small capacitor between the switch node and ground, which can reduce the frequency of the ringing signal. Continue to increase the capacitance until the frequency of the ringing signal is reduced to 50% of the original ringing frequency. Reducing the ringing signal frequency to 50% means that the total resonant capacitance is 4 times the original capacitance. Therefore, the value of the original capacitance Cp is 1/3 of the newly added capacitance. This can be used to calculate the value of the parasitic inductance Lp: The series capacitor Cs in the RC snubber circuit needs to be large enough so that the suppression resistor can show a stable resonance suppression effect during the circuit resonance. If the value of this capacitor is too large, its charging and discharging process in each switching cycle will cause excessive power consumption. Therefore, the value of Cs is usually 3 to 4 times the value of the circuit parasitic capacitance. In addition to suppressing resonance, the RC smoothing suppression circuit can also slightly reduce the rise and fall speed of the switching waveform. In addition, the charging and discharging process of the smoothing suppression capacitor will also cause additional switching current spikes during the switching state transition, which can cause new EMI problems in the low-frequency area. When using an RC smoothing circuit, you should be sure to check the total power loss of the circuit. The efficiency of the converter will inevitably decrease, especially at high switching frequencies and high input voltages.

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RL snubber suppression circuit An unimaginable way to suppress the ringing signal of the switching loop is to add a series RL snubber suppression circuit to the resonant circuit, which is shown in Figure 11. The purpose of adding this circuit is to introduce a small amount of series impedance in the resonant circuit, but it is enough to provide some suppression. Due to the fact that the total impedance of the switching circuit is always low, the suppression resistor Rs can be very small, about 1Ω or less. The inductor Ls is selected based on the low impedance at frequencies below the resonant frequency, which is actually to provide a short circuit to the suppression resistor at low frequencies. Since the frequency of the ringing signal is usually very high, the inductor required can also be very small, about a few nH, and can even be replaced by a PCB copper foil path several mm long, which does not result in a significant increase in the loop area. It is also possible to replace this inductor with a very small ferrite bead and connect it in parallel with Rs. When doing so, the bead should have very low impedance at low frequencies below the resonant frequency, and also have sufficient current carrying capacity to carry the effective current at the input.

The RL snubber is best placed close to the input node of the power stage. One disadvantage of the RL snubber is that it introduces an impedance to the switching loop in the high-frequency region. When the switching state changes rapidly, the switching current pulse will form a short voltage glitch on the resistor Rs, which will also appear as a small glitch at the input node of the power stage. If the voltage glitch at the input makes the voltage too high or too low, the switching of the power stage or the operation of the IC will be affected. Therefore, when the RL snubber is added, the voltage glitch on the input node must be checked under the maximum load state to avoid possible problems. 6. Practical Examples This chapter will demonstrate the effects of different approaches to EMI design for buck converters. The IC used for the demonstration is the RT7297CHZSP, a 800kHz, 3A current mode buck converter in a PSOP-8 package. The circuit under test operates at 12V input and outputs 3.3V/3A. The test circuit is shown in Figure 12. There are two versions of the board used for the test, one with a full ground copper layer and one without. Several optional configurations are provided on the board, such as LC input filter, different input capacitor placements, optional Rboot, RC snubber circuits, and output LC filter. The PCB design with these different options is shown in Figure 13.

The configuration of the test equipment is shown in Figure 14.

When the object under test is placed on the experimental table, the current loops and wires on its PCB will radiate high-frequency energy to the surrounding environment. These radiation signals will find their own paths back to the test object and appear on the power supply line in the form of high-frequency common-mode current. These high-frequency common-mode currents on the power supply line will be combined with the current on the board and can be used as an indication of the radiation status.

The power input of the converter comes from three lithium-ion batteries connected in series, with a voltage of about 12V, which makes them have no direct connection with other equipment in the laboratory. An electrolytic capacitor is placed across the battery leads to eliminate any resonance problems that may be caused by the battery inductance. The converter load is a 1Ω resistor in parallel with a 10μF MLCC capacitor, which provides a 3A load while providing very low impedance to high frequency signals. The ground end of the input line on the battery side is connected to the bench ground through a 100Ω resistor, which provides a reference ground for the entire circuit with an impedance similar to the LISN network used in EMC testing. A homemade EMI current test tool (see Chapter 8) can be placed on the power supply input and output lines. In this article, we use an oscilloscope to view the measured high-frequency current signal, which can show the high-frequency small signals during the converter switching period. For this repetitive switching signal, it is possible to use the oscilloscope's FFT function to calculate and see the various frequency components in the measured current. Although this method is not as accurate as a spectrum analyzer, it is still a very practical tool that can provide a basis for judgment in the analysis of simple circuits.

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Input Capacitor Placement Experiment 1: Place CIN away from the IC. The PCB layout in Figure 16 shows a poor placement of the input capacitor, which will introduce large parasitic inductance into the switching loop. (There is additional clearance in this layout to increase the loop area.)

We first do a general check on radiated noise by measuring the common-mode current on the input lines.

As can be seen from the waveform on the right side of Figure 17, the common-mode current is surprisingly large and is visible across a wide frequency band. We can use the loop antenna to search for radiated fields above the PCB to find the source of the common mode current. When the loop antenna is moved above the input loop, the oscilloscope shows huge radiated noise in the low frequency band up to 200MHz, see Figure 18. We also see high overshoot and ringing signals on the switching waveform, which actually exceed the IC's withstand voltage specification. These conditions show that incorrect input capacitor placement can cause high radiation and huge ringing signals.

If the same test is performed on a board with a ground plane on the back side, we will see that the radiation caused by this large CIN loop with a ground plane is much lower than the result on the single-sided board, and the ringing signal caused by switching is also lower. See Figure 19.

The high-frequency magnetic field formed by the current in the large loop will generate eddy currents in the ground layer. The magnetic field formed by the eddy currents is opposite to the direction of the original magnetic field, thus canceling out part of the original magnetic field. The closer the ground layer is to the loop, the better the cancellation effect. Experiment 2: Place CIN close to the IC We continue to use a single-sided PCB and place CIN close to the IC, thus forming a relatively small CIN loop. See Figure 20.

The amplitude of the overshoot and ringing signals during the switching process are reduced by about 50%, the radiation intensity is reduced by about 10dB, and the bandwidth is extended to 300MHz.

The most important conclusion of the above experiment is that it confirms that better placement of CIN can improve the amplitude of overshoot and ringing signal on the switching waveform, and can also reduce high-frequency radiation. In RT7297CHZSP, the heatsink pad at the bottom of the chip is not connected to the wafer core, so connecting the copper foil and the heatsink pad together in the PCB layout cannot shorten the CIN loop. Its upper and lower MOSFETs are connected to the VIN and GND terminals through multiple bonding wires, so the shortest loop can be formed through these two terminals.

Experiment 3: Add an additional 10nF small capacitor directly between the VIN and GND terminals of the IC Figure 22 shows the placement of the capacitor. Now the CIN loop is formed through the IC pins, the internal bonding wires and the 0603 specification capacitor.

From the experimental results, the overshoot on the switching waveform has actually disappeared, but the low-frequency ringing signal still exists.

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In order to see the signal clearly, the test antenna had to be moved closer to the PCB. The result showed that the high-frequency noise had disappeared, but a large low-frequency spike appeared at about 25MHz.

This low-frequency resonance is often caused by two capacitors in different resonant loops resonating in parallel. This problem often occurs in the process of EMI problem solving. Both the loop and the resonance need to be located to eliminate it. In this case, the resonance occurs on the 10nF capacitor and the 4nH parasitic inductance (about 3mm conductor length), which form a resonant signal of about 25MHz. This resonant loop is formed by the 0603 capacitor, IC pin, bonding wire and PCB copper foil path, and its length is about 3mm. The solution to this problem is to connect a 22μF 1206 capacitor with a slightly higher ESR in parallel next to the small 10nF capacitor. The PCB layout design using the optimized CIN placement method is shown in Figure 24.

After adopting the above solution, the overshoot on the switch switching waveform on the single-sided board has completely disappeared, and the radiation noise detected by the loop antenna is also very low. The waveform obtained after FFT calculation is almost at the background noise level.

If we use a high-frequency current probe to measure the common-mode current on the input line at this time, we will see that the common-mode noise has dropped a lot. Compared with the results of the first measurement, the difference in some frequencies is more than 30dB, indicating that the radiation level of the entire board is already very low.

Filtering on the power input line The high-frequency current on the power input line consists of differential mode current and common mode current. For the common mode current, the current loop with high current change rate dI/dt can be minimized and reduced during PCB layout design. The differential mode current has different sources. We can measure it by passing the positive and negative lines through the magnetic core of the homemade current probe in different directions as shown in Figure 27.

The differential mode current we want to measure is formed by the voltage drop caused by the ESR and ESL (if any) formed by the PCB layout when the pulse-like input current of the Buck converter passes through the input capacitor. It finally appears on the power input line as a differential mode current. The differential mode current can be reduced by increasing the input capacitance, but a more effective approach is to add a small LC filter on the input line, as shown on the right side of Figure 28. No input filter Adding 10μF 1206 MLCC + 2A 0603 ferrite bead (BLM18PG121SN1) as a filter Adding 10μF 1206 MLCC + 1μH 1.5A inductor (LQH3NPN1R0) as a filter As can be seen from Figure 29, the filter formed by adding ferrite beads + capacitors can filter out all high-frequency components except the 800kHz fundamental wave, and the filter formed by adding 1μH inductor + capacitors can eliminate all differential mode noise including the fundamental wave.

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Filtering on the output line When measuring the differential signal at the output, we can see fewer high-frequency components. This is because the output current is continuous and the current change rate is not high. However, we can still see low-frequency noise up to about 30MHz. This is because the current ripple on the inductor in the converter is transferred to the output end through the output capacitor and becomes the differential current on the output end. After all, these capacitors also contain ESR and ESL. Most of the differential signal can be filtered out by adding an additional LC filter at the output. This filter can be composed of a magnetic bead and an MLCC capacitor. The method is shown in Figure 30.

Method for measuring differential mode signals at 3.3V output Output without filter Results after using output filter (22μF 1206 MLCC + 0603 4A ferrite bead BLM18SG700TN1) One thing that often happens is that the leakage flux of some inductors will couple into the output loop, which will also cause the appearance of differential mode current at the output. The leakage flux of shielded inductors will be lower, and their magnetic field signals are not easy to enter the output loop, but the situation is completely different for unshielded or semi-shielded inductors. Once such a situation is encountered, the area of the output loop must be minimized so that it is not easy to couple the leakage flux of the inductor. Reduce the ringing signal by adding a series resistor in the bootstrap circuit and using an RC snubber suppression circuit In this experiment, we use a double-sided PCB, and the placement of the input capacitor is the same as in Experiment 2 above. This configuration can introduce more obvious radiation in the input loop.

For reference, the common-mode current on the input line is first tested without Rboot and RC snubber suppression circuit. The switching waveform shows a 5V overshoot, and the oscillation frequency of the overshoot signal is 238MHz; the common-mode current on the input line shows obvious high-frequency noise. Refer to Figure 33.

The RT7297C uses a relatively small high-side MOSFET (110mΩ), so the effect of adding a small series resistor to the bootstrap circuit is small. It was found that even increasing Rboot to 20Ω did not change the waveform significantly. The oscilloscope plot below compares the waveform with 0Ω (grey) and the waveform with 33Ω series resistor. It can be seen that the overshoot amplitude is reduced to 3V. This change also has a small effect on the common-mode current and is almost invisible in this simple measurement.

To determine the value of the RC snubber, we use the method described in Chapter 5. The original frequency of the ringing signal is fRING = 238MHz. After adding the 220pF capacitor, fRING becomes 114MHz, so CP = 220pF/3 = 73pF. 386461 Waveform without RC buffer suppression circuit Waveform after adding RC buffer suppression circuit Common mode current after adding RC buffer suppression circuit Adding RC buffer suppression circuit can reduce the common mode current by 5dB in the high frequency band.

The rising edge is clean and has no ringing. The falling edge has no change.

As can be seen from the above figure, Rboot has a relatively small impact on efficiency, but its impact will increase when the load is very heavy. The RC smoothing suppression circuit will have a relatively large impact on efficiency, especially under light and medium load conditions, but the maximum is only 1~2%, which is within an acceptable range. It should be noted that when the operating frequency of the Buck converter is very high and the input voltage is very high, the RC smoothing suppression circuit will have a large impact on efficiency.

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7. Buck Converter PCB Layout Design Tips The key to a good Buck Converter PCB layout design is to plan the placement of key components from the beginning. In noise-sensitive applications, it is best to choose a wafer flip chip with a small package and low inductance.

Determine the location of the VIN and GND nodes of the switching loop, and place input capacitors of different sizes as close to these nodes as possible, with the smallest capacitor being closest to the node. Since this switching loop carries a high current change rate dI/dt, it needs to be as small as possible.

Place the output capacitor ground where it does not overlap with the input capacitor switching path to prevent high-frequency noise from being injected into the output voltage.

The switching nodes and BOOT pins have high voltage change rates dV/dt, which can cause severe electric field radiation, so their copper foil area should be kept to a minimum and away from other sensitive circuits. The small signal part of the converter should be separated from the high-power switching part, and its ground should be located in a clean and noise-free place, and never introduce input current signals and output ripple current into it.

Do not use thermal resistance pads on critical loops, as they will introduce unnecessary inductance. When using a ground plane, try to maintain the integrity of the layer under the input switching loop. Any cut in the ground plane in this area will reduce the effectiveness of the ground plane, and even signal vias through the ground plane will increase its impedance. Vias can be used to connect the decoupling capacitor and IC ground to the ground plane, which can minimize the loop. But it is important to remember that the inductance of vias is between 0.1 and 0.5 nH, depending on the thickness and length of the vias, and they can increase the total loop inductance. For low impedance connections, it is appropriate to use multiple vias.

In the above example, the additional vias to the ground plane did not help reduce the length of the CIN loop. But in another example, because the top layer has a long path, it is very effective to reduce the loop area through vias. It is important to note that using the ground plane as a return path for current will introduce a lot of noise into the ground plane. To solve this problem, the local ground plane can be isolated and then connected to the main ground at a very low noise point. When the ground plane is very close to the radiating loop, its shielding effect on the loop is effectively enhanced. Therefore, when designing a multi-layer PCB, place the complete ground plane on the second layer so that it is directly below the top layer that carries the high current. Unshielded inductors will generate a lot of leakage magnetic flux, which will enter other loops and filter components. Semi-shielded or fully shielded inductors should be used in noise-sensitive applications, and sensitive circuits and loops should be kept away from the inductor.

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8. Simple EMI detection tools you can make Measuring EMC problems usually means taking your prototype to an EMC lab for testing. There is usually a 3m anechoic room and special measurement equipment using antennas and receivers. The data can show the final results of the entire system, but it is not always easy to find the root cause of a specific radiation problem in such a place.

It is actually possible to perform some basic EMI tests on the prototype in a lab environment, and also on each module of the system. Such tests are usually in the near field environment (measurement distance < 0.16λ), so a small loop antenna is needed to measure the high-frequency magnetic field when testing the radiation of the current loop. You can make a small electrically shielded loop antenna yourself using a 50Ω coaxial cable. This does not seem to be a difficult thing to do. Please refer to the schematic diagram in Figure 43. This loop antenna can be connected to a spectrum analyzer and as you move it across the PCB you can see where there are strong high frequency fields. You can also connect it to an oscilloscope (using 50Ω terminations) and the oscilloscope will show the switching noise level in the corresponding area. Keeping the relative position and distance between the antenna loop and the board the same, make some changes to the circuit and the loop on the PCB and you can see whether the noise level is increasing or decreasing. Since the radiation from power lines has a great impact on EMI levels, you can also measure the high frequency current on these lines. Not all current probes have enough bandwidth to highlight EMI problems, which can be solved by passing several turns of the coil through an EMI core to form a high frequency current transformer. This is done in the same way as the loop antenna, but the loop needs to be passed through the core three times. See Figure 44.

The high frequency current can now be measured by passing the cable through the core. The output of the current transformer can be connected to a spectrum analyzer or oscilloscope (using the 50Ω port). In order to isolate the test tool from the test object, it is best to add a common mode coil to the cable. This can be achieved by passing the cable leading to the analysis device through a snap-on EMI core several times.

Passing the positive and negative wires of the power line through the core in the same direction can measure the common mode current. Reversing the direction of one of the wires can measure the differential mode current. See Figure 45. Another handheld tool is the current probe, which is a miniaturized current transformer with an open core, see Figure 46. This tool can be used to measure high frequency currents in copper paths or component leads.

This tool is somewhat difficult to make. You can make it by grinding a ferrite bead with two holes to get an open core, add 4 to 5 turns of wire, and connect it to the coaxial cable. It is best to put this core in a shield with an opening. When using this tool, you should be aware that it will also pick up some electric field signals. To determine whether the result you are measuring is from the magnetic field or the electric field, you can turn the tool 90 degrees above the path. If the measurement is from the magnetic field, the result will become 0. If the signal is from the electric field, the result will not change.

Current probes let you know how changing high-frequency currents flow on boards and components, and can even show you how currents flow on copper foil: you will find that high-frequency currents always take the shortest path on copper foil. In fact, even eddy currents on ground planes can be measured. All tests in this article were performed using the tools described here.

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9. Conclusion Solving EMI problems can be a complex matter, especially when faced with a complete system and the sources of radiation are unknown. With a basic understanding of high frequency signals and current loops in switching converters, an understanding of how components and PCB layout behave at high frequencies, and the use of some simple homemade tools, it is possible to easily solve EMI problems by identifying the sources of radiation and low-cost solutions to reduce radiation. The main radiation source in a buck converter is the input switching loop of the converter, which is the focus of our consideration. Switching converters in different packages can play an important role in obtaining the best component layout to achieve the lowest EMI solution. Reducing the switching speed of the converter can help reduce EMI, but it is usually not the best choice. Shielding through ground planes is very effective, and they should be as long and complete as possible, and as close to the radiating loop as possible. Filtering the input and output lines can effectively reduce the level of conducted emissions.

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