Because the speed of writing flash to the node is too slow under the tinyos system, I began to suspect that there was something wrong with the speed of SPI, so I later directly read and wrote FLASH on the bare metal on IAR to see how fast it could go. The DMA mode of SPI of 430 is used. The reason why DMA mode is faster is that the data to be transmitted does not need to be processed by the CPU, but is directly transmitted to the DMA register on the internal bus, and then the DMA register is transmitted to the target register through the bus according to the situation. I haven't figured out the bus here yet. When DMA is transmitting data, although the CPU can continue to do its own work, if the CPU wants to use the bus, and the bus is occupied by DMA, what should I do at this time? [plain] view plain copy void SpiDmaSend(uint8_t cmd,uint8_t *tx_addr, uint8_t *rx_addr,uint16_t len) { DMACTL0 =DMA2TSEL_3 + DMA0TSEL_4; IFG1 &= ~( UTXIFG0 | URXIFG0 ); //Clear interrupt flag DMA2SA = (unsigned int)&U0RXBUF; // Src address = UART RX Buffer DMA2DA = (unsigned int) rx_addr; // Dst address = rbuf DMA2SZ = len; DMA2CTL = DMADT_0 + DMASBDB ; cmd==SPI_READ ? (DMA2CTL|=DMADSTINCR_3):(DMA2CTL|=DMADSTINCR_0); DMA0SA = (unsigned int) tx_addr; DMA0DA = (unsigned int)&U0TXBUF; DMA0SZ = len ; DMA0CTL = DMASBDB; cmd==SPI_WRITE? (DMA0CTL|=DMASRCINCR_3):(DMA0CTL|=DMASRCINCR_0,DMA0SZ+=1); DMA2CTL|= DMAEN; DMA0CTL|= DMAEN; IFG1 |= UTXIFG0; while((DMA0CTL & DMAIFG)==0); DMA1CTL&=~ DMAEN; DMA2CTL&=~ DMAEN; IFG1 &=~UTXIFG0; DMA1CTL &= ~DMAIFG; } To use DMA mode, first select the channel. There are three DMA channels in MSP430. Because SPI duplex communication is used, one channel is used for sending and one channel is used for receiving. Then, it is necessary to configure the trigger mode of the channel, the number of bytes to be transmitted by each channel, and the transmission mode of the channel, whether it is single byte transmission (single) or block transmission (block). At the same time, it is necessary to configure whether the address pointers of the source address and the destination address should be incremented. Regarding the difference between the single and block transmission modes, I couldn't understand it when I read the datasheet at that time. Later, I checked it online, and even the author himself said that the description of the document would be confusing. At that time, I suddenly felt that it was not entirely because I was too stupid to understand it. Regarding the difference in transmission modes, you should read the reference manual. I can't explain it clearly.