EEWORLD University - How to evaluate the voltage spike of parasitic inductance in switching power supply layout

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EEWORLD University - How to evaluate the voltage spike of parasitic inductance in switching power supply layout [Copy link]

How to evaluate the voltage spike of parasitic inductance in switch-mode power supply layout : https://training.eeworld.com.cn/course/4784

The current trend in switching power supplies is toward wide bandgap devices because these devices support higher switching frequencies and higher edge rates. These two factors, in turn, drive power supplies to be smaller, lighter, and cheaper. If you can switch more frequently, the magnetics and capacitors can be smaller. Higher edge rates lead to higher efficiency: if you can reduce switching losses, less heat is dissipated and the transistors can switch faster. But these high switching rates also have a downside, notably larger voltage spikes and noise due to layout parasitics, especially the inductance of PCB layout traces. This webinar will discuss how to evaluate these parasitic inductances and voltage spikes.