Share some situations of DSP program crash (flying) - hardware reasons

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Share some situations of DSP program crash (flying) - hardware reasons [Copy link]

DSP is different from FPGA. Programs running on DSP may crash, that is, run away. Checking crashes is basically what every DSP or embedded engineer will experience when debugging. DSP crashes may be caused by hardware or software. Let's talk about the possible reasons caused by hardware first. There are four categories that I have encountered: 1. Unstable reset circuit; 2. Unstable power supply; 3. Unstable clock; 4. Unstable bus. Let's explain them one by one. 1. Unstable reset circuit is easy to understand. It means that there is a reset signal suddenly coming during operation. At this time, the DSP resets and the DSP program runs away or the program runs again. If it is online hardware simulation, it basically runs away or crashes (the program does not run). I have encountered two situations where the reset is unstable: The first situation is that when the reset circuit is designed, the reset time is not enough, that is, the low level is not kept for a long time. In this way, when the power is on and loaded, sometimes it can be loaded normally, sometimes it can't, and sometimes it crashes after loading and running for a period of time. The second situation is that the reset circuit is added with a watchdog circuit. The watchdog not only monitors the dog feeding (WDI) signal, but also monitors the DSP working voltage value. If it is less than a certain voltage range, a reset signal is generated. Generally, at room temperature, there will be no change in the working voltage value. However, when the temperature of the DSP working environment changes, frequent resets may occur. 2. Unstable power supply Unstable power supply is mainly caused by unstable core power supply. On a circuit board, there may be DSP, FPGA and other chips at the same time. The core voltage may be the same and the same power supply is used. When the DSP chip has a large workload, the working circuit continues to increase, thereby lowering the core voltage, resulting in instantaneous voltage shortage, which may cause the DSP program to run away, and this situation has basically no effect on the FPGA. The second situation of abnormal reset circuit can also be considered as unstable power supply. 3. Unstable clock Unstable clock causes DSP and ARM to crash more often. Here are a few examples. The clock signal has a small amplitude and weak energy. It is normal when working at room temperature and there is no problem working for a long time. At low temperature (-40 degrees), the clock signal may be so weak that it cannot continue to work for the DSP, so the DSP crashes and is reset by the watchdog. However, the FPGA is basically not affected by the clock, and the clock continues to work. The solution to this situation is to increase the amplitude of the clock, add a comparator to increase the clock amplitude, and other methods to solve it. DSP generates clocks through the FPGA's phase-locked loop (PLL) (so the frequency is more flexible) to work, but when the FPGA output clock pin is not a dedicated clock pin, the clock may be unstable in some cases, causing the DSP to freeze or run away. Solution: Replace other clock pins on the FPGA to output the clock.