Looking at the Xilinx Datasheet, you will notice that Xilinx FPGAs do not have PLLs. In fact, DCM is a time management unit. ----------------------------------------------------- [b]DCM Overview[/b] D
TI Electronic Design Contest --- TI Component Comparison Table for Electronic Contest[[i] This post was last edited by qwqwqw2088 on 2013-7-11 23:13 [/i]]
Should the base addresses of ADC be ADC0_BASE andADC1_BASE respectively, or should they be unified asADC_BASE? Also, should interrupts be written for both modules or just one? I'm a little dizzy after
[postbg]bg7.png[/postbg][font=Times New Roman][size=5] Since a recent project requires temperature measurement, mainly to detect the ambient temperature of the system. The first thing that comes to mi