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Training > Embedded Development > FPGA

Total of 13 lessons ,8 hours and 41 minutes and 35 seconds

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Chapters

Chapter 1：How to use digital electronics thinking to scientifically design FPGA (59 minutes and 4 seconds)
Chapter 2：How to scientifically design the logic level of FPGA RTL code (19 minutes and 5 seconds)
Chapter 3：How to scientifically design FPGA series: Xilinx reset mechanism and cross-clock domain processing (46 minutes and 10 seconds)
Chapter 4：How to design FPGA scientifically: Timing constraint basics, understanding timing analysis models (25 minutes and 57 seconds)
Chapter 5：How to scientifically design FPGA timing constraints and analysis in VIVADO and advanced techniques (31 minutes and 17 seconds)
Chapter 6：How to design FPGA scientifically: AXI interpretation of achieving AXI bus freedom (1 hours and 17 minutes and 1 seconds)
Chapter 7：How to scientifically design FPGA and write AXI bus interface from scratch (46 minutes and 10 seconds)
Chapter 8：How to design FPGA scientifically? Follow-up of AXI tearing by hand, self-write AXI interface simulation verification (31 minutes and 17 seconds)
Chapter 9：How to scientifically design the logic level of FPGA RTL code (19 minutes and 5 seconds)
Chapter 10：How to design FPGA scientifically: Timing constraint basics, understanding timing analysis models (25 minutes and 57 seconds)
Chapter 11：How to scientifically design FPGA series: Quickly tearing AXI slave SLAVE including ram code construction (1 hours and 16 minutes and 24 seconds)
Chapter 12：How to scientifically design FPGA series: GT transceiver GTX GTH S of Xilinx FPGA (32 minutes and 51 seconds)
Chapter 13：How to scientifically design FPGA series: Use and simulate GTX GT of Xilinx FPGA GT transceiver (31 minutes and 17 seconds)

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