TEC control system based on DRV824X-Q1 series

In the polymerase chain reaction (PCR) equipment, the temperature in the test tube needs to be controlled to allow the DNA in the tube to undergo high-temperature denaturation (unwinding the DNA into double-stranded DNA), low-temperature annealing (complementary pairing of primers and template DNA), and medium-temperature extension (amplification under constant temperature). Figure 1 shows the temperature control cycle of DNA replication.

Figure 1 Temperature control curve of PCR

The speed of heating and cooling the equipment and the temperature control accuracy are very important indicators in PCR equipment. Different from the traditional water bath heating and fan cooling methods, the temperature control system based on the semiconductor refrigeration chip (Thermo Electric Cooler, TEC, also called Peltier or Peltier) has the advantages of small size, light weight, fast cooling speed, simple and flexible control method, etc. The cooling principle of TEC is shown in Figure 2. When the voltage is forward biased, TEC cools, and when the voltage is reverse biased, TEC heats up.

Figure 2 TEC temperature control principle

Since the cooling and heating rate of TEC is related to the current, several Peltier cascades are usually used to quickly increase the temperature. At this time, a current driving circuit higher than 10A is required. The traditional TEC control circuit uses discrete components to build an H-bridge drive, as shown in Figure 3. This solution is complex in design and large in size, but can withstand large currents. High integration saves board space and cost.

Figure 3 TEC control circuit based on H-bridge

Application of DRV824X-Q1 in TEC Control

TI now launches the DRV824X-Q1 series of highly integrated DC motor drive solutions, which use BiCMOS high-power process technology to provide excellent power handling and thermal performance. This series is pin-compatible, and once a design is completed, it is easy to expand to other part numbers in this series. Taking DRV8245-Q1 as an example, this device has the following advantages as a TEC H-bridge control chip.

1. Ultra-high integration and supports up to 32A output drive current and 100% duty cycle PWM

It integrates the pre-driver plus MOSFET required for H-bridge driving. The ultra-high integration can save board space and simplify the design. The internal structure of DRV8245-Q1 is shown in Figure 4. The device uses TI's HotRodTM QFN (FCOL QFN) package, which has the advantages of small size, low parasitic effects and high current support. HotRodTM QFN packaging technology reduces the package size of these high-power drivers by more than half while maintaining the high current drive capability required in TEC applications. It can support up to 32A peak current in H-bridge driving and up to 46A peak current in half-bridge driving. It can be seen from the figure that the device integrates a charge pump regulator inside, which can support N-channel MOSFET with 100% duty cycle operation. Table 1 summarizes the Ron (LS+HS) parameters of the DRV824X-Q1 series. It can be seen from the table that the Ron (LS+HS) of this series can be as low as 32mΩ.

Figure 4 DRV8245-Q1 internal functional block diagram

Table 1 Ron (LS+HS) of DRV824X series

2. Configurable slew rate and SSC (Spread Spectrum Clocking) to optimize EMI

In the SPI version of this device, the SR has 8-level adjustable settings. As shown in Table 1, the slew rate setting can be changed at any time by writing to the register S_SR. At the same time, the SPI version also supports SSC (Spread Spectrum Clocking).

Table 2 DRV8245-Q1 SR Table

3. Integrate various protection functions

The DRV824X-Q1 family integrates various protection features to ensure device robustness.

1. Over-current protection (OCP) and over-temperature protection

In the event of a hard short circuit, the analog current limit circuit on each MOSFET also limits the peak current of the device. If the output current exceeds the overcurrent threshold IOCP for a time longer than tOCP, an overcurrent fault is detected.

The device has multiple temperature sensors around the die. If any sensor detects an overtemperature event set by TTSD for a time greater than tTSD, an overtemperature fault is detected.

2. Off-State Load Monitoring Function (OLP)

The impedance of the OUTx node can be determined in standby mode when the power FET is off. Through this diagnostic, the following fault conditions in standby mode can be passively detected, as shown in Figure 5:

Output short circuit to VM or GND, impedance < 100 Ω

For full bridge load or low side load open circuit, load impedance > 1K Ω

At VM=13.5V, high side open circuit, load impedance> 10kΩ

Figure 5 Off-State diagnostic diagram in full-bridge state

3. On-state load diagnosis (OLA)

During the PWM switching transition, when the LS FET is off, the inductive load current flows into VM through the HS body diode. The device looks for a voltage spike above VM on OUTx. This voltage spike is observed when the load current is higher than the pull-down current (IPD_OLA) sourced by the FET driver. The absence of this voltage spike for 3 consecutive re-circulating switching cycles indicates a loss in load inductance or an increase in load resistance and is detected as an OLA fault.

Figure 6 On-State diagnosis diagram