What is the principle of UART serial communication?

What is the UART communication protocol?
As an asynchronous serial communication protocol, UART works by transmitting each character of the transmitted data one by one. The meaning of each bit is as follows:
Start bit: First send a logic "0" signal to indicate the start of character transmission.
Data bit: Immediately after the start bit. The number of data bits can be 4, 5, 6, 7, 8, etc., to form a character. Usually ASCII code is used. Transmission starts from the lowest bit and is positioned by the clock.

Parity bit: After adding this bit to the data bit, the number of "1" bits should be an even number (even parity) or an odd number (odd parity) to verify the correctness of data transmission.

Stop bit: It is a sign of the end of a character data. It can be 1 bit, 1.5 bit, or 2 bit high level. Because the data is timed on the transmission line, and each device has its own clock, it is very likely that there will be a small desynchronization between the two devices during communication. Therefore, the stop bit not only indicates the end of the transmission, but also provides the computer with an opportunity to correct the clock synchronization. The more bits applicable to the stop bit, the greater the tolerance for different clock synchronization, but the slower the data transmission rate.

Idle bit: in the logic "1" state, indicating that there is no data transmission on the current line.


Working principle of UART serial communication
(1) Data transmission process
Idle state, the line is at a high level; when receiving the send command, the line is pulled down for a data bit time T, and then the data is sent in sequence from low to high. After the data is sent, the parity bit and stop bit are sent, and a frame of data is sent.
(2) Data reception process:
Idle state, the line is at a high level; when the falling edge of the line is detected (high level changes to low level), it means that the line has data transmission. According to the agreed baud rate, the data is received from low to high. After the data is received, the parity bit is received and compared to see if it is correct. If it is correct, the subsequent device is notified to receive the data or store it in the buffer.
Since UART is asynchronous transmission and there is no transmission synchronization clock, in order to ensure the correctness of the data, UART uses a clock of 16 times the data baud rate for sampling. Each data has 16 clock samples, and the middle sampling value is taken to ensure that the sampling will not slip or error. Generally, the number of data bits in a UART frame is 8, so even if there is a clock error in each data, the receiving end can still sample the data correctly.

The timing of receiving data of UART is: when the falling edge of data is detected, it indicates that there is data to be transmitted on the line, and the counter CNT starts counting. When the counter is 24=16+8, the sampled value is the 0th bit of data; when the counter value is 40, the sampled value is the first bit of data, and so on, the next 6 data are sampled. If parity check is required, when the counter value is 152, the sampled value is the parity bit; when the counter value is 168, the sampled value is "1" indicating the stop bit, and data reception is completed.