Research on computer video monitoring system based on RS-485 bus

    Abstract: This paper proposes a method of using RS-485 bus to form a video surveillance system. The system uses a portable video compression terminal to carry video images for real-time compression, and transmits the compressed image data to the host through the RS-485 bus.

    Keywords: video surveillance RS-485 bus image compression DSP chip

The RS-485 bus has strong anti-interference ability, can realize multi-station long-distance communication, is convenient for networking, and has low cost, so it is widely used in the field of industrial control. With the substantial increase in the transmission speed of serial communication interface chips and RS-485 interface chips, it is possible to use the RS-485 bus to transmit image data. However, the amount of data in uncompressed video images is huge. Even if the bus transmission speed is as high as 1Mbps, It takes 2.1s to transmit a 512×512×8 grayscale image, so the video image data must be compressed and encoded before being transmitted through the bus. The video surveillance system introduced in this article uses a portable image compression terminal to collect, transform and encode image signals at the video output end of the camera, and uses a pair of twisted pairs to transmit the compressed image data to the RS-485 bus standard. Host computer. In this way, a 64-128-point local area network can be formed using only one cable. Not only is the wiring simple, but the transmission rate is as high as 1Mbps, which is far higher than the transmission rate of the telephone network.

1 Composition of video surveillance system

This monitoring system consists of a host computer and multiple slave computers, as shown in Figure 1. The host computer is an industrial computer, which contains a high-speed RS-485 communication card. It mainly completes tasks such as control and management of the monitoring system and post-processing of image data. The slave machine is a portable image compression terminal. The terminal uses TI's TMS320VC5402 digital signal processor as the core and extends some peripheral devices to form an independent video image compression and transmission device. It mainly completes real-time collection, transformation coding and transmission control of video images. . Communication between the master and the slave is carried out through the RS-485 bus. It mainly starts and controls every communication on the network. Each slave has a unique address. Only the addressed slave responds to the host's command and sends information frames back to the host. When the number of slaves exceeds 64 or the distance from the master exceeds 120m, a repeater should be installed on the network to ensure the communication rate reaches 1Mbps.

2 Introduction to Portable Image Compression Terminal

The compression terminal is a key component of this system, and the block diagram is shown in Figure 2. It uses TMS320VC5402 DSP as the processor and expands the video processor, line and field separation circuit, frame buffer, program memory, serial communication interface chip and RS-485 bus interface chip.

2.1 Introduction to TMS320VC5402 DSP

TMS320VC5402 DSP (hereinafter referred to as C5402) is a new generation fixed-point DSP chip produced by TI Company. It has a clock frequency of 100MHz and is extremely cost-effective. It is currently the mainstream fixed-point DSP product. There are 8 data or address buses in the C5402 chip, forming an enhanced Harvard structure bus system. Instructions are executed in a pipeline manner, and most instructions can be completed in a single cycle. In addition, there is a set of parallel operation instructions that can perform a store/load operation and an arithmetic operation in a single cycle, greatly improving the speed of digital signal processing. C5402 has 16KW DARAM on-chip, which can be used as program memory or data memory. In addition, there are two multi-channel buffered serial ports (McBSP), an 8-bit HPI interface, two 16-bit timers, a six-channel DMA controller and A PLL clock generator.

2.2 Video acquisition circuit

Video image signal acquisition consists of a video buffer, a high-speed A/D converter and a horizontal and vertical synchronization separation circuit. The A/D converter uses TI's TLV5510 chip. TLV5510 is an 8-bit, 10Msps high-speed parallel A/D converter. In this circuit, TLV5510 is used as an extended parallel input port of C5402, and the R/W signal of C5402 is used as the conversion clock. Signal, start A/D conversion when reading this port. The horizontal and vertical synchronization separation circuit outputs horizontal synchronization signal, vertical synchronization signal and odd and even field signals as the external interrupt input signal of C5402. C5402 uses interrupt response mode to collect odd field data and even field data of a frame of image.

2.3 Memory configuration

The 480KB frame buffer is used to store original image data and compressed image data, and the 32KB FlashROM is used to store application programs. Both are mapped to the external data space of C5402. Since the data space of C5402 is only 64KW, memory page expansion technology is used to expand the external data space to 16 pages, each page is 32KB. Use an expansion output port of C5402 as the page selection signal of the expanded memory, select pages 0 to 16 respectively, and connect the A15 pin of C5402 to the enable end of the expanded static RAM. When A15=0, select the on-chip RAM. When A15 =1 selects off-chip RAM. Therefore, the data memory configuration of this system is as follows:

On-chip: 16KW DARAM address is 0000h～3FFFh

On-chip: 32KB FlashROM address 8000h～FFFFh

Off-chip: 480KB SRAM address n8000h～nFFFFh (n=1～15)

When the system hardware is reset, the page selection signal is automatically cleared, the FlashROM is mapped to the data space, and the C5402 loads the application program in the FlashROM into the on-chip DARAM.

2.4 Data transmission circuit

Data transmission uses TI's asynchronous serial transceiver TL16C550 and MAXIM's MAX3485E. TL16C550 contains 16bit FIFO and the communication rate reaches 1Mbps. MAX3485E is a half-duplex RS-485 bus interface chip with a transmission rate of 12Mbps and a transmission distance of 4000 feet.

2.5 Software implementation

The C54x DSP integrated development tool supports C language and assembly language programming. In order to improve code execution efficiency and meet the needs of real-time image compression and transmission, assembly language programming is used. The main program can be divided into the following parts:

(1) Initialize C5402, accept the command frame from the host computer, and prepare to collect images;

(2) Turn on odd field interrupt (INT1), turn off even field interrupt (INT2) and line interrupt (INT3);

(3) When the odd field synchronization signal arrives, C5402 enters the odd field interrupt service subroutine, opens the line interrupt, and is ready to collect odd field data. When the line synchronization signal comes, C5402 enters the line interrupt service subroutine and continuously collects one line of image data. When each row of image data is collected, the row interrupt is turned off;

(4) When the even field synchronization signal arrives, C5402 enters the even field interrupt service subroutine, opens the row interrupt, and is ready to collect even field data. When the line synchronization signal arrives, C5402 enters the line interrupt service subroutine and continuously collects one line of image data. After each line of image data is collected, turn off line interrupts and odd and even field interrupts;

(5) Divide the image data into a series of 8×8 blocks, first perform DCT transformation, quantization, and Huffman coding on the first data block, then open the serial port interrupt (INT0) and send the compressed image data to the host machine. This encoding and transmission process is repeated until all image data processing is completed. Finally, close the serial transmission interrupt and start processing the next frame of image.

3 Communication software design

This system is a master-slave monitoring system, where the host starts and controls every communication on the Internet. The host first issues an image acquisition command to the slave, and then receives the compressed image data from the slave. The slave accepts the command from the host, adjusts the focal length and lens direction of the camera, modifies the image size and sampling rate according to the command requirements, and finally performs image collection, compression and transmission. To complete these functions, strict network communication protocols must be defined.

3.1 Network communication protocol

This network is a dedicated system that requires a communication rate of 1Mbps, so it uses circuit switching. Information transmitted over the Internet is only in one of two forms: command frames or information frames.

The command frame sent from the master to the slave consists of eight bytes, as shown in Table 1. The address is the slave address to be accessed, and the valid address is 0~255; the focal length is the focal length encoding of the camera; the direction is the direction encoding of the camera lens; the size is the size encoding of the image; the speed is the image sampling rate encoding; control Encoding of control commands for on-site control equipment or alarms; verification - end of command frame and verification flag.

Table 1 Command frame format

The scale information frame sent from the slave machine to the master machine is shown in Table 2. The address is the slave address; the status is the status code of the camera focus and lens direction adjustment mechanism and other control equipment; the data is the image compression code stream; the check is the information frame checksum end flag. The address, status, and verification are all one byte, and the data length is variable.

Table 2 Information frame format

3.2 Slave communication program design

The slave communication process is shown in Figure 3. After the compression terminal is powered on and reset, the serial port interrupt is opened, and the RS-485 interface chip is in the receiving state. Once it receives the command frame from the host, the compression terminal adjusts the focal length, lens direction and the status of other control devices according to the requirements of the command frame, and then collects and compresses the image while detecting the status of the bus. If there is no speaker on the bus, the compressed code stream will be sent to the host, and the bus will be occupied until all information frames of one frame are sent. In order to improve image processing efficiency, compression and transmission are performed in parallel.

3.3 Host communication program design

The host communication process control is shown in Figure 4. Under normal circumstances, the host monitors all or part of the site in turn, and the compressed data sent from each compression terminal is saved separately and displayed on the computer screen after decompression. Once an abnormality occurs, the host automatically monitors the abnormal site individually. The host detects the status of the bus before sending command frames to the compression terminal. If there is no speaker on the bus, it sends the command frame to the compression terminal, and then puts the RS-485 interface into the receiving state and waits for the compression terminal to send information frames. In order to ensure the reliability of the command frame, the command frame is sent three times continuously.

This system uses TMS320VC5402 DSP and RS-485 bus to realize real-time compression and high-speed transmission of still images. Using standard JPEG compression algorithm, it can compress and transmit 5 frames of 512×512×8 grayscale images per second, which is extremely cost-effective and suitable for monitoring and management of unmanned warehouses, supermarkets, traffic crossings, underground engineering, train carriages, etc. .