Synopsys + Arm: Essential solutions for automotive innovation

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Self-driving cars are no longer a distant concept and are even on the road in some countries. To meet new driving needs such as convenience, safety, autonomy, and electrification, the automotive industry is moving towards software-defined vehicles (SDVs). This shift requires a more powerful new electrical/electronic (E/E) architecture and a significant increase in vehicle software content. To remain competitive, original equipment manufacturers (OEMs) need to adopt new SDV development methods so that their innovative products can be launched as quickly as possible.


In the SDV era, the automotive industry is re-examining its product development methods. They need high-performance, energy-efficient chips to execute the increasing software workloads. Synopsys fully supports the Arm®-based automotive supply chain, helping from Arm-based optimized chip design to the development of vehicle software verification and testing. Synopsys and Arm collaborate to optimize various solutions, covering early architecture exploration, chip design and verification, and the deployment of automotive-grade IP and digital twins of electronic products, striving to accelerate SDV innovation, reduce costs, and shorten time to market.


The transition to SDVs requires the automotive industry to rethink the development process and take advantage of new design methodologies such as digital twins. Working with industry partners such as Synopsys to optimize the design of automotive solutions based on Arm's automotive-enhanced technologies is critical to increasing the speed of SDV deployment and reducing overall costs.


Suraj Gajendra


Vice President of Products and Solutions, Automotive Business Line


Arm



How digital twins enable automotive semiconductor design to shift left


As users pay more and more attention to the content of vehicle software, the automotive industry urgently needs to adopt a more agile approach to shorten the original long development cycle, simplify complex maintenance models, and continue to perform wireless (OTA) updates throughout the vehicle life cycle. Digital twins of electronic products help to shift automotive development left, thereby supporting early integration of hardware/software and early testing. Digital twins can provide a virtual representation of the system under development and can be used to model automotive SoCs, software, electrical systems, and even entire vehicles. Some use cases of automotive digital twins include:


  • Conduct early architectural exploration of next generation Arm-based architectures


  • Start developing software for new MCUs and SoCs long before silicon tapes out


  • Verify SoC performance and power consumption


  • Development and testing of electronic control units (ECUs), automotive platform software, and application software


Synopsys and Arm have collaborated to integrate key technologies to support digital twin use cases, providing a full set of models for the next generation of safety-oriented Arm automotive enhancement (AE) technologies. Synopsys has made a series of contributions to this, including Synopsys Platform Architect™ SoC architecture analysis and optimization solution, Synopsys Virtualizer™ virtual prototyping solution, Synopsys ZeBu® and HAPS® hardware-assisted verification platform. In terms of architectural optimization, Platform Architect supports Arm interconnect performance models. Arm fast models accurately reflect the functions of Arm CPU and system IP from the developer's perspective. The model is integrated with the Virtualizer tool so that developers can develop software before hardware is available. Arm fixed virtual platforms are pre-configured simulations of common system configurations, which are supported by the Virtualizer tool and Synopsys IP and third-party models. Arm RTL can be executed on ZeBu and HAPS platforms to verify power consumption and performance; and can support hybrid solutions with the help of Synopsys Virtualizer to accelerate the software startup process.


In addition, Synopsys design and verification solutions such as Synopsys.ai full-stack AI-driven EDA total solution and Fusion QuickStart design implementation kit are fully optimized for performance and power consumption, helping our customers accelerate the development and delivery of optimized Arm-based SoC designs through the new 3nm/2nm all-around gate (GAA) technology. For Arm-based automotive designs, Synopsys' functional safety design and verification solutions can help our joint customers meet the requirements of the ISO 26262 standard.


In addition, Synopsys is also participating as a voting member in an industry-oriented automotive industry collaboration project, the Scalable Open Architecture for Embedded Edge (SOAFEE) project. The technical foundation of the SOAFEE project meets the standard boot and security requirements defined for the Arm architecture, and aims to improve the efficiency of software development, testing and verification, and create a cloud-native architecture supported by open source reference implementations for various automotive applications.



Working together to make software-defined cars a success


Autonomous driving features, electrification, network connectivity, and smartphone-like in-car experiences all require a lot of computing power, which places higher demands on the design of the chip itself. Whether this computing power demand is met through a single-chip SoC or a multi-die design, developers must seek a balance to minimize power consumption, improve heat dissipation, and reduce space. Chip design challenges such as these undoubtedly require the entire ecosystem to work together to overcome difficulties.



In this ecosystem, Synopsys is responsible for providing design and verification solutions, silicon-proven interfaces, security protection, and process, voltage, and temperature (PVT)-related IP for chip lifecycle management (SLM), thereby promoting the development of safe, reliable, and high-quality automotive chips and systems. For example, Synopsys SLM IP can be integrated into Arm-based cores to detect the operating conditions of chips in development environments and actual use environments, thereby measuring and optimizing the performance of semiconductor lifecycle statistics, mission analysis measurements, and field fault diagnosis. Our cloud deployment reference flow integrates Arm-based models to support a variety of key use cases, such as enabling billions of kilometers of virtual driving and improving test coverage. Our technology complies with the ISO 26262 functional safety standard and can help developers meet the requirements of the vehicle cybersecurity framework described in ISO/SAE 21434. In addition, our experts actively participate in various automotive standard organizations, share their vision, and contribute to the development of SDVs. Our large partner ecosystem is ready to support the development of Arm-based automotive systems through virtual ECUs.


Synopsys, Arm, and other members of the ecosystem will work together to drive the pace of innovation and make every effort to create more advanced and intelligent next-generation software-defined cars. Click to read the original article to learn more about our virtual prototyping solutions for Arm.


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