On September 6, Advanced Application Specific Integrated Circuit (ASIC) manufacturer Creative Electronics Corporation (GUC) announced that its HBM3 IP solution based on TSMC's 5nm process technology has passed 8.4 Gbps tapeout verification. The platform includes a full-featured HBM3 controller and physical layer IP (PHY IP), as well as vendor HBM3 memory powered by TSMC's advanced CoWoS® technology.
Currently, HBM memory vendors have an aggressive roadmap to increase the transfer rate and memory size from HBM3 to HBM3E/P, and further double the signal bus width on HBM4. However, basic DRAM timing parameters have not changed, and HBM controllers have become increasingly sophisticated to improve bus utilization.
Creative Electronics' HBM3 controller can achieve over 90% bus utilization during random access while maintaining low latency. Creative Electronics' HBM3 IP using TSMC's 5nm technology has passed tape-out verification and launched the HBM3 IP using TSMC's 3nm technology at the beginning of this year. This IP supports TSMC CoWoS-S and CoWoS-R and can reach the next generation of HBM3E/P memory (yet in planning) speed. Since 2020, Creative Electronics’ HBM controller and physical layer IP have been used in customer-produced HPC ASICs.
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