Use of SignalTap

1. The role of SignalTap

SignalTap is an IP (corresponding to ila of Xilinx) that can display the status of pins in real time. This is based on board-level verification and can effectively handle some waveform tests that are difficult to achieve with simulation. For example, the test of inout ports is difficult to achieve with simulation and it is difficult to build a suitable test tool. Using signaltap can effectively obtain interactive information.

2. SignalTap Operation

Add a test signal:

Double-click a blank space in setup to call up the required signal list. Here you need to pay attention to the distinction of signals. The default signal is after synthesis. The signals here are more complicated. You can consider using other signal lists, such as before synthesis.

Set the clock:

The test signal also needs a clock to refresh. This is equivalent to the working clock of the logic analyzer. This clock directly determines the sensitivity of the signal.

There is also test depth, which is how much time is displayed at the same time. This directly takes up storage space.

Compile the project:

SignalTap just builds an IP and needs to be recompiled to instantiate it into the project.

Online debugging:

After confirming that the connection is successful, import the generated sof file and start debugging.

Trigger mode:

Setting the trigger mode is to add constraints to the display signal. For example, adding a falling edge trigger means that the signal can be refreshed when a falling edge appears, otherwise it will wait.

3. Actual use of SignalTap

In general, it is not difficult to use. You can consider using it when you have actual hardware.