Signal Generator Architecture—From Analog Output to Advanced Features

NI signal generators utilize the Synchronization and Memory Core (SMC) architecture to provide a common interface between onboard memory, external hardware, and digital-to-analog converters (DACs) in a single device. This white paper compares two types of signal generators—arbitrary function generators and arbitrary waveform generators. In addition, this paper explores various aspects of signal generators, including memory architecture, DAC considerations, digital gain, filtering and interpolation, signal generation engines, and various events. A typical signal generator block diagram is shown in Figure 1.

Figure 1. Signal generator block diagram

The following sections examine the role of each component in the signal generation process. In addition, you will learn the technical details necessary to generate the best possible signal using a signal generator. Note that signal generators vary in type and functionality. For example, arbitrary function generators typically use less than 1 MB of onboard memory. On the other hand, arbitrary waveform generators use up to 512 MB of onboard memory and advanced sequencing capabilities. In addition, some arbitrary waveform generators implement onboard signal processing (OSP) capabilities to generate baseband I/Q signals and IF signals. Since OSP is beyond the scope of this white paper, please see the OSP introduction for more information.

1. Types of signal generators

The vast majority of signal generators contain common components such as a DAC, on-board memory, and analog or digital filtering circuits. However, signal generators can be divided into two categories based on their memory options and clock characteristics. These two categories of signal generators are function generators and arbitrary waveform generators (AWGs).

Function Generator

Function generators are designed to generate periodic waveforms at precise frequencies. In fact, they often use a clocking mechanism called direct digital synthesis (DDS) to generate precise frequencies to better than 1 µHz. In addition, DDS gives function generators the ability to change frequency on the fly in a phase-continuous manner. And because function generators output a repetitive waveform, they require only limited memory to store a single cycle of that waveform. NI arbitrary function generators can generate a wide variety of periodic waveforms from a standard library (which includes waveforms such as sine, square, ramp, and triangle) or from user-defined 16 kS waveforms. Some common applications for function generators include filter characterization, stimulus-response testing, and generating clock signal sources.

Arbitrary Waveform Generator

AWGs, on the other hand, are designed to generate large and often complex waveforms. As a result, they employ deep onboard memory and complex clocking mechanisms. In fact, the SMC architecture handles up to 512 MB of memory. In addition, AWGs are capable of advanced waveform concatenation, looping, and scripting for even more complex sequences. The SMC also provides many advanced markers and triggers for synchronization with other instruments. We will discuss these features in more depth in this white paper.

2. Depth board storage

Modern signal generators (especially AWGs) implement deep on-board memory to store large waveforms. PCI or PXI-based instruments can use this memory efficiently because the PCI bus makes high throughput possible.

Signal generators use onboard memory to store both waveforms and sequence instructions. A complex sequence of instructions can take up considerable space in memory. In fact, with the architecture of NI signal generators, you can load multiple waveforms and multiple sequence instructions into the memory of the same instrument. Figure 2 shows a typical NI signal generator's memory allocation.

Figure 2. Memory allocation for the signal generator

Note that NI signal generators have up to 512 MB of onboard memory for extended operation. Furthermore, using the NI-FGEN driver, you can write and replace waveforms in memory while the signal generator is generating one. Thus, taking advantage of the high throughput available on the PXI bus, you can continuously overwrite waveform segments to generate a stream of waveforms.

3. Digital-to-Analog Converter (DAC)

Modern signal generators use advanced DACs to convert digital waveforms in memory to analog signals. All DACs used by NI have a sample-and-hold feature, where the DAC holds a discrete voltage level for a given period of time.

4. Digital Gain and Attenuation

Since the signal generator is designed to generate a wide range of voltage signals, both analog gain amplifiers and digital gain processing are used to maximize the amplitude accuracy and flexibility of this signal generator.

Typically, NI signal generators provide three different gain paths to amplify the DAC analog output to different analog voltage ranges. The example output of each path is shown in Figure 3.

 

Figure 3. Signal generator gain amplifier

In addition, the signal generator uses digital gain to amplify or attenuate the signal, thereby utilizing the full range of the DAC. With this feature, the sampled signal is digitally resized by the gain factor before being generated into the analog signal. Therefore, you can adjust the amplitude of a given signal on the fly without having to load a different waveform into memory again. For a given signal path, you can amplify the waveform to its maximum range.

5. Interpolation and filtering

As mentioned earlier, a DAC can only approximate a true ideal signal. In fact, because a DAC's stepped output results in high-frequency images, modern signal generators implement both analog and digital filters to provide the best approximation of an ideal analog signal. As an example, the time domain signal of an unfiltered signal is shown in Figure 4.

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Figure 4. Sample-and-hold output of a DAC

High frequency images are a result of the sample and hold output. The frequencies of these images are each multiple of the sampling frequency plus or minus the fundamental frequency. Thus, when you generate a 20 MHz sinusoid sampled at 100 MHz, you will see patterns at 80 MHz, 120 MHz, 180 MHz, and 220 MHz. Figure 5 shows the frequency domain characteristics of this 20 MHz sine wave.

Figure 5. Spectrum of a 20 MHz sine wave

As this figure shows, high-frequency spectral images distort the frequency domain of the signal you are generating.

NI signal generators use an analog filter and/or a digital filter to remove high-frequency images. First, a digital finite impulse response (FIR) filter interpolates the signal to increase the effective sampling rate. For example, a 20 MHz sine wave is sampled at 100 MS/s and then interpolated four times to achieve an effective sampling rate of 400 MS/s. By increasing the effective sampling rate, the spectral images that are closest to the new effective sampling rate are shown in Figure 6:

Figure 6. Spectral pattern of a 20 MHz sine wave interpolated by a factor of 4

As shown in Figure 6, the digital filtering process (interpolation) cannot completely eliminate the spectral images. In fact, it only shifts them to higher frequencies. However, many signal generators also use an analog filter. This analog filter can attenuate these spectral images below the noise level. This is shown in Figure 7, which shows the same frequency domain plot after you apply a low-pass analog filter.

Figure 7. A 20 MHz sine wave interpolated and processed by an analog filter.

As shown in Figure 7, these spectral images have fallen below the noise level of the device. In this specific example, the analog low-pass filter attenuates the high-frequency images by as much as 60 dB. As a result, the signal generator is able to generate an analog signal that more accurately approximates the ideal analog signal. In turn, you can observe the time domain waveform of the signal filtered by the interpolation kernel, as shown in Figure 8:

 

Figure 8. Time domain plot of a 20 MHz sine wave

Figure 8 shows that the individual staircase signals that were so obvious in the time domain have disappeared. In fact, the output looks like a pure sine curve. Thus, both interpolation and analog filtering help improve a signal generator's ability to accurately approximate an analog signal.

6. Clock

Just as the accuracy of a DAC has a significant impact on the amplitude accuracy of the generated signal, the clock applied to the DAC has a significant impact on the frequency accuracy of the generated signal. Therefore, the impact of an accurate clocking mechanism is measurable in the frequency domain of a signal. Modern signal generators offer a variety of clocking methods that allow the DAC output to be at a precise frequency with minimal clock jitter. The following sections describe each clocking mechanism and its technical advantages.

N times frequency division

The divide-down (or divide-by-N) clock mechanism divides down a signal generator's timebase to provide specific frequencies. This component uses a voltage-controlled crystal oscillator (VCXO) to generate a fundamental high-frequency timebase for the signal generator. From this timebase, the divide-by-N circuit can derive frequencies that are integer divisors of the signal generator's timebase. For example, you can divide a 200 MHz timebase to get frequencies such as 200 MS/s, 100 MS/s, 66.6 MS/s, and 50 MS/s.

This divide-by-N clocking scheme is preferable because it provides the least jitter with the sampling clock. However, it is also the least flexible clocking scheme because the effective sampling rate must be an exact divisor of the time base.

High-precision clock

Another optional clocking mechanism for signal generators is High Precision Clocking, which supports the finest frequency accuracy. With this mechanism, it is possible to derive a sampling clock up to the maximum sampling rate, even if it is not an integer divisor of the base timebase. NI signal generators use this clocking mechanism to derive clocks with better than 1 µHz accuracy. This clocking mode is useful for applications that require a precise clock frequency that cannot be achieved using a divide-down clocking strategy. However, the High Precision Clocking mechanism will result in more clock jitter than the divide-by-N mechanism.

Direct Digital Synthesis (DDS)

NI function generators use a clocking mechanism called direct digital synthesis. DDS works by first storing a large number of repetitive waveforms in a limited memory space. For NI products, a single cycle of a waveform (sine, triangle, square, and arbitrary waveforms) can be represented and stored in memory with exactly 16,384 points. Once the waveform is in memory, it can be generated at very precise frequency points.

It is important to note that waveform generation using DDS is fundamentally different from arbitrary waveform generation. With arbitrary waveform generation, each sample of the waveform is stored in memory and generated sequentially. Signal generation using DDS works slightly differently. With this mode of operation, a single cycle of a waveform is stored in memory. However, when generating this signal, the DAC does not generate every point of the waveform. In fact, when generating a precise frequency, the DAC ignores the samples during the signal generation process in order to obtain the desired sampling rate, as shown in Figure 9:

Figure 9. Generating a 21 MHz signal using direct digital synthesis

The implementation of DSS requires a lookup table to determine the phase of the signal generated on time at any frequency point. Figure 10 shows the module of waveform generation based on direct digital synthesis.

 

Figure 10. Functional blocks of direct digital synthesis

As shown in Figure 10, a phase accumulator compares the sample clock to the desired frequency to increment a phase register. The basic idea is that DDS selects the appropriate sample based on the instantaneous phase of the desired signal, resulting in a periodic signal at a precise frequency. By using 214 (16384) points to represent your waveform, you can use your lookup table to represent exactly 16384 phase increments. With DDS, a function generator can generate signals at precise frequencies. In fact, with a 48-bit DDS, the NI-5406 provides better than 1 µHz frequency accuracy.

Reference Clock

Although the signal generator uses a sampling clock to determine when a new sample is generated, a reference clock is still important for synchronizing multiple instruments. When using a reference clock, the signal generator can phase-lock its sampling clock to an external clock through a phase-locked loop (PLL). A PLL is a feedback circuit that aligns the phase of the sampling clock with the reference clock (see Figure 11). Therefore, by sharing the same reference clock between multiple devices, you can synchronize the sampling clocks and align the generated signals. Figure 11 shows the block diagram of a basic PLL.

Figure 11. Basic phase-locked loop circuit

As shown in the block diagram, the PLL is a closed-loop control system that controls the phase of the VCXO. The phase detector outputs a voltage that is proportional to the phase difference between the two input signals. Finally, the loop filter adjusts the phase of the oscillator clock to match the phase of the reference signal. Therefore, the reference frequency and the sampling clock can achieve precise phase matching.

7. Connection and loop (waveform generation engine)

NI signal generators utilize the advanced SMC feature to connect and loop waveform segments. Connecting and looping can be divided into two generation modes, sequence mode and script mode. With sequence mode, you can configure a signal generator to output a series of predefined waveforms using sequence instructions stored in onboard memory. On the other hand, script mode is even more powerful because it allows you to create a dynamic waveform sequence where the output of the signal generator depends on the state of a hardware trigger or software trigger. In addition, script mode utilizes conditional statements such as "if/else" to implement branching waveform sequences. With both connection and looping modes, you can configure the signal generator to output one or more trigger signals with features such as markers or marker events.

Sequential Mode

In Sequential mode, you can generate a series of waveforms through a pre-configured sequence. In addition, you can implement various trigger modes to advance to the next waveform in the sequence. Common trigger modes include Single Trigger, Continuous Trigger, Step Trigger, and Burst Trigger. Each of these modes provides different output options when generating different waveforms. For example, the Step Trigger mode is described below.

In step trigger mode, you use a trigger to step through each waveform in a sequential list. When you start a generation session, the first waveform loops the number of times you configured in the step. When the waveform completes the set number of loops, the last sample of the waveform is repeated continuously until the next trigger signal is received. When the next trigger signal is received, the second waveform is generated and iterates the configured number of times. This process repeats until the last configured waveform is generated. At this point, a trigger condition is required to start the generation sequence again. This process is shown in Figure 12.

Figure 12. Sequencing using step trigger patterns

As shown in Figure 12, the signal generator begins generating the first waveform at t0 (when the first trigger signal is received). Furthermore, it continues to loop by generating "Waveform 0" until the configured number of loops is reached (two in this case). As you can observe from Figure 12, the signal generator continues to drive the last sample of "Waveform 0" until the next trigger signal is received at t1.

Script Mode

While sequence mode allows a signal generator to output a series of waveforms when it receives a trigger signal, it has its own limitations. Essentially, sequence mode requires you to configure each step before the signal generation begins. In order to configure a dynamic script (where the output is conditional), you must use a more advanced form of sequencing called a script.

Scripting allows a signal generator to dynamically output a sequence of waveforms based on hardware or software events in the system. In addition, it is the most advanced waveform control feature due to its flexibility. Using scripts, you can not only connect and loop multiple waveforms, but also generate a waveform conditional on an event occurring inside the device under test after configuring a script trigger. With script triggers, the script engine dynamically selects the waveform to be generated, depending on the state of a specific trigger signal line.

For example, consider a script that uses the "Repeat Until" command. Using this script, "Waveform 1" is configured to repeat until the script trigger signal becomes true. This script is shown in Figure 13.

Figure 13. Example of a script using the "Repeat Until" command

Note that "scriptTrigger0" is used as a variable to determine which waveform should be generated. In this script, the signal generator first generates "waveform 0". Once this waveform is generated, it loops through generating "waveform 1" and continues to repeat until "scripttrigger0" becomes true. (Make sure these two variables are the same.) Once this event occurs, the signal generator generates "waveform 2" before the sequence is completed. The resulting output signal of this script is shown in Figure 14:

 

Figure 14. Output of a signal generator using the Repeat Until script

As shown in Figure 14, the signal generator continues to generate "waveform 1" until "scripttrigger0" becomes true. Therefore, using scripts, you can generate dynamic waveforms by configuring a script trigger to determine the output of the signal generator.

8. Trigger signals and events

To achieve synchronization with other instruments, the SMC architecture provides features such as marker events and data marker events. Using these events, you can configure your signal generator to generate output trigger signals that control the behavior of other instruments. When using marker events, you can configure up to 1 (sequential mode) or 4 (script mode) trigger signal lines to change state in synchronization with a configured number of samples. In contrast, with data marker events, you can route up to four bits of analog waveform to up to four trigger signal lines. With this type of output trigger, the state of the trigger is embedded in the actual waveform.

Marker symbol events

A marker event is described by giving an offset (measured in samples) from the start of the waveform. In Sequential mode, you can configure one marker event for each step in the sequence. In Script mode, you can configure up to four markers with different offsets in a particular waveform. As you can see in Figure 15, the trigger signal line associated with this marker goes true on the same clock edge that generates the 20th sample. In addition, you can observe that in this case, the trigger signal line remains true for 40 cycles of the sample clock frequency.

Figure 15. Timing of marker event output

Note that you can configure the behavior of this marker output in a variety of ways using the Property Node. Figure 15 shows the marker event configured as an eight-cycle pulse with one sample clock.

Data Marker Events

The data marker event allows you to output up to four waveform data bits as a digital signal to a physical trigger signal line. For example, a typical signal generator uses a 16-bit DAC; 16-bit samples are sent to the DAC for each sampling clock cycle. However, you can also route up to four bits of each sample to the physical trigger signal line. In turn, you can configure these four waveform bits as a digital waveform to synchronize with other hardware. Although you can choose any four bits, the least significant four bits are usually used to minimize the impact on the analog output. Figure 16 shows a timing diagram of a signal using the data bit marker symbol.

Figure 16. Bitwise representation of a waveform

Figure 16 shows that the lowest four bits of each 16-bit sample have been highlighted. Using this data marker symbol event, you can route each of these bits directly to a trigger signal line as a digital signal.

Summarize

Modern signal generators use SMC architecture to support the generation of complex and precise analog signals. Therefore, signal generators are able to generate a variety of signals and serve a wide range of applications.