Design of controller module in simple digital storage oscilloscope

　　Through the functional analysis of the simple storage oscilloscope, its composition structure can be obtained as shown in Figure 1. The whole system consists of a controller module, a human-machine interface, a signal input channel, a signal display module, and a data communication interface. Due to space limitations, this article only introduces the design of the controller module.

2. Controller module design scheme

　　Generally speaking, the controller module should have the following main functions: it can start collecting, storing and displaying the measured signal when the trigger conditions are met;

Determine the corresponding sampling rate based on the frequency range of the signal being measured;

when displaying the stored signal, you can select a suitable rate to read out the stored signal data and restore it to analog quantity;

in order to enable A/D to convert at a suitable analog input signal amplitude, the gain of the signal conditioning circuit should be selected according to the vertical sensitivity requirements.

　　There are three options for controllers that can achieve the above functional requirements:

(1) Implemented with large-scale integrated circuits, such as complex programmable logic devices (CPLDs);

(2) Implemented with single-chip microcomputers, such as the popular MCS-51 series single-chip microcomputers;

(3) Implemented with single-chip microcomputers and complex programmable logic devices.

　　Among the above three options, option (1) has a fast working speed of the programmable logic device, which is in the order of nanoseconds, and can meet the design requirements for the highest sampling rate, but the hardware is large, the design is complex and difficult, and the debugging process is cumbersome. The advantage of option (2) is that the system scale is small and has certain flexibility, but it is not suitable for observing high-speed or complex signals. However, because the working speed of the single-chip microcomputer depends on its machine cycle, the machine cycle of the current 12 MHz clock single-chip microcomputer is 1 μs, which can fully meet the requirements when the sampling rate is not too high. Option (3) is that under the management of the single-chip microcomputer, the complex programmable logic device (CPLD) completes the high-speed control function, such as the acquisition and storage of high-speed signals, while the single-chip microcomputer manages the CPLD and the entire simple digital storage oscilloscope. Here, based on the principle of economy and practicality, plan (2) is adopted.

3. Hardware design of controller module
　
　　According to the function of the controller, the controller module should be a single-chip microcomputer minimum system with the single-chip microcomputer as the core. The single-chip microcomputer used in this design is 89C52. The 89C52 single-chip microcomputer minimum system mainly consists of 8 kB RAM, address decoding circuit, clock circuit, reset circuit and other parts. Its circuit principle is shown in Figure 2. In the figure, 74HC373 is an address latch, which is used to latch the low 8-bit address of the address signal line; 6264 is an 8 kB data memory, which is used to store signal sampling data, so 13 address lines are required for addressing; 74HCl38 is a decoder, which adopts full address decoding mode, and the decoding output is used to select each corresponding chip and perform related operations under the action of the single-chip microcomputer.

　　The address allocation of the off-chip expansion RAM unit and the interface circuit is as follows:

The storage space of 6264 is: 0000H ~ 1FFFH.

　　The chip select signal of the D/A conversion interface circuit: Y axis: 2000H ~ 3FFFH; X axis: 4000H ~ 5FFFH.

　　The data transmission selection signal (XFER) of the D/A conversion interface circuit: 6000H ~ 7FFFH.

　　Gain selection signal latch select signal: 8000H~9FFFH.

　　Scan speed selection signal latch selection signal: 0A000H~0BFFFH.

4. Controller module software design

　　In order to make the program concise and reliable, a top-down programming method is adopted in the software, making full use of the system's interrupt function and subroutines.

5 Conclusion

　　This design is for the case where the frequency of the measured signal is low. The controller module is based on a single-chip microcomputer, which reduces the system scale, reduces the system cost, and has a certain degree of flexibility.