Research and Design of Arbitrary Wave Generator

    An arbitrary waveform generator (AWG) is a signal generator that can download the desired arbitrary waveform to the memory of the instrument, store the actual waveform and the waveform sequence instructions required to form these waveforms, and can generate arbitrary waveforms by changing the waveform data. It can not only generate conventional waveforms such as sine waves, sawtooth waves, triangle waves, but also generate various modulations, such as frequency modulation, amplitude modulation, phase modulation, and pulse modulation. Moreover, the waveform can be edited through computer software to generate various arbitrary waveforms required by users.

1 Introduction to basic theory
1.1 Basic structure of DDS
    As a design method of arbitrary waveform generator, the basic structure of DDS is shown in Figure 1, which is mainly composed of modules such as phase accumulator, waveform RAM, DAC and low-pass filter. First, the frequency control word is input, and the phase information is output through the phase accumulator. The waveform lookup table performs phase-amplitude conversion according to the phase information. The obtained waveform data is converted into an analog waveform signal after D/A and low-pass filtering.

    The relationship between the output waveform frequency fo and the frequency control word K, the phase accumulator bit number n and the sampling clock fc is:
    
    From formula 1, it can be seen that the maximum frequency of the output signal of the arbitrary waveform generator based on DDS technology is determined by the working speed of the three modules: phase accumulator, waveform RAM and D/A converter. When the storage depth of the memory chip is constant, that is, the accumulator bit number n is constant, the output signal frequency fo is jointly affected by the frequency control word K and the sampling clock, and is proportional to the product of the two:
    fo∝Kxfc (2)
    The phase accumulator takes the frequency control word K as input for accumulation, and its output is the address signal required for sampling the waveform data RAM. The input and output rates are controlled by the clock. It is not difficult to understand that the upper limit of the sampling clock fc is the maximum reading rate of the waveform data RAM. When the maximum reading frequency of the RAM chip used is constant, the maximum value of fc has been determined. From formula (2), it can be seen that in order to increase the value of fo, it is necessary to start with the K value. When K is larger, the number of points sampled in a waveform is smaller. According to the Nyquist sampling theorem
    
    , at least two discrete waveform data must be sampled in a complete waveform to ensure that the signal can be fully reproduced in subsequent processing. Therefore, there is an upper limit to the increase of the K value. The
    arbitrary waveform generator designed with DDS technology has the advantages of high frequency resolution, continuous phase when frequency jumps, and convenient implementation, but it also has shortcomings. First, when the accumulated phase step is large, the output waveform is prone to jitter; second, because the DDS technology only extracts part of the data in the waveform memory, the output waveform will produce a certain degree of distortion. [page]
1.2 The principle of software radio generating arbitrary waveforms
    Another design principle of the arbitrary waveform generator is shown in Figure 2. Its working principle is to use software to generate waveform data and download it to the memory. The output address of the addressing circuit is changed by accumulating the clock counter. The counter scans each address of the waveform memory one by one until the end of the memory. The waveform data in the address is sent to the D/A converter to convert the digital signal into an analog signal, and then the output signal is smoothed by the low-pass filter to obtain the required waveform. In this design scheme, all the waveform data in the memory are sent to the D/A converter, so the distortion is small. However, if all waveform data contents in the memory are to be output and the frequency of the output signal is to be arbitrarily variable, the sampling clock frequency needs to be editable, which is obviously different from the waveform generator composed of DDS. The arbitrary wave output frequency of this design scheme is:
    
    where fs is the sampling clock frequency. The circuit structure of this design scheme is simple, and the waveform that can be output is relatively complex, which is most suitable for waveform generators that can be edited by users.

2 Circuit Design for Generating Arbitrary Waveforms
    Figure 3 shows the hardware block diagram of the arbitrary waveform generator. For common waveforms such as sine waves, square waves, and triangle waves, direct digital frequency synthesis (DDS) technology is used for design. This is based on the mapping relationship between amplitude and phase. The step amount of the phase accumulator is changed by changing the frequency control word. The summed phase is sampled under a fixed sampling clock to obtain an amplitude sequence corresponding to the same phase sequence. The amplitude sequence can then be converted to an analog signal output through D/A conversion. The frequency is controlled by phase accumulation through the frequency control word. In the corresponding relationship between phase and amplitude, various waveforms (including sine waves, triangle waves, sawtooth waves, etc.) can be selected by changing the waveform data in the memory. The AM modulation process can be mathematically described as the product of the carrier signal and the modulation signal in the time domain. In the implementation process, the amplitude modulation depth can be expressed as the relative size of the peak-to-peak value of the modulation signal and the carrier signal amplitude. Therefore, the amplitude modulation depth can be controlled by adjusting the peak-to-peak value of the modulation signal amplitude. The principle of FM modulation is based on the correspondence between the modulation signal amplitude and the carrier signal frequency. Therefore, FM modulation can be achieved by simply superimposing the modulation signal amplitude on the frequency control word of the carrier signal. During the implementation process, the frequency deviation is determined by the peak-to-peak value of the modulation signal amplitude.

    For more complex waveforms, the hardware circuit consists of a sampling clock generator, an addressing generator, a RAM memory, a high-speed D/A, waveform data generation software, and a data import interface. Its working principle is to store the waveform data to be generated in the RAM memory through computer software, and then change the address of the RAM memory through the addressing generator, scanning the memory address one by one until the end of the RAM storage. The waveform data corresponding to each address is sent to the high-speed D/A, and the output signal is amplified and output after reconstruction and filtering. The quality of arbitrary wave signal generation is determined by many factors such as D/A sampling rate, vertical resolution, waveform storage depth, sampling clock signal quality, etc., and the design of the overall human-computer interaction software determines the convenience of use and the completeness of functions.

3 Conclusion
    At present, the development trend of arbitrary waveform generators is hardware modularization, generalization, and platformization, using software radio to form various complex modulation signals. On the one hand, we strive for greater perfection in hardware indicators such as frequency response, spurious signals, harmonics, data exchange speed, continuous conversion rate, and dynamic range; on the other hand, we integrate software processing such as data encoding, digital filtering, FFT or IFFT transformation, digital noise addition, signal simulation, level amplitude, and output mode. In a unified software window, we use modular hardware and integrated software to achieve this by clicking on the generator. Under a unified data interface, the hardware and software can be designed separately and in parallel, making the development of AWG more professional and improving the performance and indicators of AWG.