Brief Introduction of Shunt Diode Envelope Detector

Shunt Diode Envelope Detector

The principle circuit of this detector is shown in Figure 5.5-15A. In the figure, CL is the load capacitor, RL is the load resistor, and RL is connected in parallel with the diode VD to provide a path for the average component of the VD current. Since RL is connected in parallel with VD, this circuit is called a parallel circuit.

The parallel circuit has the same detection process as the series circuit. When VD is turned on, U1 charges CL, and the charging time constant is RDCL1. When VD is turned off, CL discharges through RL, and the discharge time constant is RLCL. As can be seen from the figure, the voltage UO on RL has a large high-frequency component. If a low-pass filter composed of RLCL is added (indicated by a dotted line in the figure), the output voltage UO can be obtained.

The parallel circuit has the disadvantages of lower voltage transmission coefficient than the series circuit (due to the voltage division loss of the resistors connected to the RL and CL ends of the low-pass filter), and the input resistance R14 is also lower (R1D≈1/3HL). Its advantage is that CL can also serve as a DC isolation capacitor, and the circuit is relatively simple . Therefore, the parallel circuit is generally used in circuits that need to isolate the DC voltage contained in the high-frequency signal source.