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Design of motion estimation based on FPGA

  • 2014-03-05
  • 471.31KB
  • Points it Requires : 1

This paper adopts the relatively mature VHDL language for design and uses Quartus II software for timing simulation. From the simulation results, it can be seen that this design scheme has obvious advantages in terms of function realization, search accuracy, efficiency and utilization of FPGA on-chip resources.

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