ASIC Implementation of Coordinate Transformation Module in Digital Down Converter Liu Xinlin Shuisheng Li Guangjun School of Communication and Information Engineering, Chengdu University of Electronic Science and Technology Abstract: This paper introduces the structure of coordinate transformation module in digital down converter (DDC) based on CORDIC algorithm and the ASIC implementation of this structure. This structure has the advantages of fast speed, resource saving and good scalability. Digital down conversion (DDC) technology is the core technology of software radio receiver. Its basic function is to extract the required narrowband signal from the input broadband and high-speed digital signal, down-convert it into a digital baseband signal, and convert it into a lower data rate for further processing by the subsequent DSP. At present, many models of DDC chips actually have functions far more than just down conversion, but also include shaping filters, timing synchronization interpolation filters, resampling NCO, coordinate transformation, digital AGC and other functions. Its structure is shown in Figure 1. CORDIC (Coordinate Rotation Digital Computer) is an iterative algorithm that provides methods for calculating trigonometric functions and vector modulus. This algorithm only uses addition and shift operations to perform vector rotation in an iterative manner, so it is very suitable for hardware ASIC implementation. This article describes the ASIC implementation structure of the coordinate transformation module in the digital down-converter based on the CORDIC algorithm. The main function of this module is to realize the transformation from the rectangular coordinate system to the polar coordinate system, so as to obtain the amplitude and phase values of the vector composed of the I-channel signal and the Q-channel signal, and return the obtained amplitude information to the preceding digital AGC for gain control. It can also realize the demodulation of the FM signal.
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