These BCD-to-decimal decoders/drivers consist of eightinverters and ten, four-input NAND gates. The inverters areconnected in pairs to make BCD input data available fordecoding by the NAND gates. Full decoding of BCD inputlogic ensures that all outputs remain OFF for all invalid(10–15) binary input conditions. These decoders featurehigh-performance, NPN output transistors designed for useas indicator/relay drivers, or as open-collector logic-circuitdrivers. The high-breakdown output transistors are compatiblefor interfacing with most MOS integrated circuits.
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