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XAPP440 - Power-On Performance of Xilinx CPLDs

  • 2014-03-05
  • 67.73KB
  • Points it Requires : 2

Applying power to a standard logic chip, SRAM, or EPROM, usually results in output pins tracking the applied voltage as it rises. Programmable logic attempts to emulate that behavior,but physics forbids perfect emulation, due to the device programmability. It requires care tospecify the pin behavior, because programmable parts encounter unknown variables – your design and your power environment.

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