rar

:Realize down-conversion and sampling rate conversion of high-frequency narrow-band digital signals on FPGA

  • 2014-03-05
  • 272.45KB
  • Points it Requires : 2

:The down-conversion and sampling rate conversion of high-frequency narrow-band digital signals are realized on FPGA. Since the multipliers and digital oscillators that require a lot of logic resources are completely avoided, its structure is greatly simplified. In addition, the pipeline processing structure is adopted, so that its processing speed exceeds 100M samples per second. In addition, it has the advantages of simple structure and strong reconfiguration ability, and has broad application prospects.

unfold

You Might Like

Uploader
lamaba
 

Recommended ContentMore

Popular Components

Just Take a LookMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号
×