This paper introduces the design scheme of the power supply of the powered device (PD) in the Power over Ethernet (POE) system launched by MAXIM, which complies with the IEEE 802.3af standard. It can be widely used in IP phones, wireless access points and Internet devices. Keywords: Power over Ethernet (POE); Power sourcing equipment (PSE); Powered device (PD); IEEE 802.3afThe IEEE 802.3af standard makes detailed provisions for Power over Ethernet (POE), which allows 48V power to be provided while transmitting data over Ethernet. The power sourcing equipment (PSE) defined in the IEEE 802.3af standard is a DTE or Midspan device that can provide power through a 10BASE-T, 100BASE-T or 1000BASE-T network, while the powered device (PD) defined in the IEEE 802.3af standard is a device that obtains power from the power sourcing equipment (PSE) through the network. The PSE specified in the IEEE 802.3af standard can provide about 13W of power. This allows small data devices to obtain power through their Ethernet connection without the need to obtain power from the AC power outlet on the wall. These devices include digital VoIP phones, network wireless access points, Internet devices, computer phones, security cameras, or any Ethernet-connected data devices. The introduction of the IEEE 802.3af standard has greatly expanded the application of Ethernet and also brought huge development space to Ethernet. 1 Functions of MAX5941 MAX5941A/MAX5941B is a highly integrated power IC suitable for powered devices (PDs) in Ethernet power supply (POE) systems. MAX5941A/MAX5941B has two functions: one is to provide an interface between PSE and PD, and the other is to achieve 48V power conversion to output 5V or the voltage required by PD through a DC-DC PWM controller. The output voltage can be isolated or non-isolated. The MAX5941A has a maximum duty cycle of 85% and can be used in flyback converters. The MAX5941B has a duty cycle limited to 50% and is mainly used in single-ended forward converters. 2 IEEE 802.3af PD interface characteristics The MAX5941 PD interface characteristics comply with the IEEE 802.3af standard and provide detection signature signals and classification signals for the PD. In addition, the MAX5941 also integrates an integrated isolation switch with programmable inrush current control function, as well as wide hysteresis power mode undervoltage lockout (UVLO) and \"power good\" status output. During detection and classification, the MAX5941 can ensure that the leakage current offset during the detection phase is less than 10μA due to the integrated MOSFET providing PD isolation. Its programmable current limiting function prevents high inrush currents during power-up. The UVLO power mode of these devices features wide hysteresis and long fault blanking time, which can compensate for the resistive attenuation of voltage on the twisted-pair cable and ensure that the system switches between detection, classification and power-up/down states without disturbance. The UVLO threshold of the MAX5941 is adjustable and has a default value compatible with the IEEE 802.3af standard. The MAX5941 can operate in designs with or without a diode bridge in front of the PD. Figure 1 The MAX5941 has three different operating modes: PD detection, PD classification and PD power mode. In the detection mode (1.4V≤VIN≤10.1V), the power supply equipment (PSE) will apply two voltages in the range of 1.4V~10.1V to VIN (minimum step size 1V), then record the current values at two points, and the PSE will calculate ΔV/ΔI to confirm whether the 25.5kΩ characteristic resistance exists. In this mode, most of the circuits inside the MAX5941 are in a closed state, and the offset current is less than 10μA. If the voltage applied to the PD is likely to be reversed, a protection diode needs to be installed at the input to avoid internal damage to the MAX5941. Since the PSE uses the slope technology (ΔV/ΔI) to calculate the characteristic impedance, the DC deviation caused by the protection diode has been subtracted and will not affect the detection process. In the classification mode (12.6V≤VIN≤20V), the PSE classifies the PD according to the power required by the PD. So that the PSE can efficiently manage power distribution. The IEEE 802.3af standard defines five different levels. The classification current can be set by an external resistor (RCL) connected between RCL and VEE. The PSE determines the classification of the PD by applying a voltage to the PD input and measuring the current flowing out of the PSE. When the PSE applies a voltage between 12.6V and 20V. The PSE uses the classification current information to distinguish the power required by the PD. The classification current includes the current absorbed by the 25.5kΩ detection characteristic resistor and the power supply current of the MAX5941. The total current absorbed by the PD should be within the requirements of the IEEE 802.3af standard. After entering the power supply mode, the classification current will be turned off. In the power supply mode, when VIN rises to the undervoltage lockout threshold (VUV-LO,When the voltage of Q1 drops below 1.2V and the gate-source voltage is above 5V, the MAX5941 will gradually turn on the internal N-channel MOSFET Q1. Figure 1 is a block diagram of the internal interface circuit of the MAX5941. The MAX5941 charges the gate of Q1 with a constant current (typical value is 10μA). The drain-gate capacitance of Q1 limits the rising rate of the MOSFET drain voltage, thereby limiting the surge current. In order to reduce the surge current, a drain-gate capacitance can also be added externally. When the drain-source voltage of Q1 drops below 1.2V and the gate-source voltage is higher than 5V, the MAX5941 will send a \"power good\" signal. Because the MAX5941 has a wide UVLO hysteresis and turn-off blanking time, it can compensate for the high impedance of the twisted-pair cable. 3. 48V power conversion with MAX5941 MAX5941 is a current mode PWM controller that can convert 48V input power into 5V output voltage. MAX5941 replaces the high power startup resistor with an internal regulator, which not only provides the power required for MAX5941 to start, but also stabilizes the output voltage of the third (bias) winding, thereby providing a stable working power supply for the IC. At the beginning of startup, the regulator adjusts V+ to VCC and provides bias for the device. After startup, the VDD regulator outputs a stable VCC from the third winding. This structure only requires a small capacitor to filter the output of the third winding, thus saving the cost of a filter inductor. When designing the third winding, the number of coil turns should ensure that the minimum reflected voltage is always greater than 12.7V. The maximum reflected voltage must be less than 36V. To reduce power consumption, the high-voltage regulator can be turned off when the VDD voltage reaches 12.7V. This can reduce power consumption and improve efficiency. If VCC drops below the undervoltage lockout threshold (VCC = 6.6V), the low-voltage regulator will be turned off and the circuit will re-enter the soft start. At this time, the output (NDRV) of the MOSFET driver in the undervoltage lockout state remains low. If the input voltage is between 13 and 36V, V+ and VDD can be connected to the line voltage as long as the maximum power consumption is not exceeded. In this way, the third winding can be omitted. 4 Design Example of MAX5941 The general design steps of MAX5941 are as follows: ● Determine specific requirements? ● Set the output voltage? ● Calculate the turns ratio of the main and auxiliary windings of the transformer? ● Calculate the turns ratio of the reset winding to the main winding? ● Calculate the turns ratio of the third winding to the main winding? ● Calculate the value of the current-sense resistor? ● Calculate the output inductor value? ● Select the output capacitor. Figure 2 Figure 2 is a forward DC/DC converter designed with MAX5941B. The specific calculation is as follows: (1) For the requirements of 30V≤VIN≤67V,VOUT=5V,IOUT=10A,VRIPPL≤50mV. The turn-on threshold should be set to 38.6V. (2) When setting the output voltage, the resistors R1 and R2 can be calculated according to the following formula:VREF/VOUT=R2/(R1+R2)Where VREF is the reference voltage of the shunt regulator. (3) When calculating the transformer turns ratio according to the minimum input voltage and the maximum duty cycle lower limit (44%) of MAX5941B, in order to be able to use a MOSFET with a drain-source breakdown voltage less than 200V, this design uses a MAX5941B with a maximum duty cycle of 50%. Then calculate the turns ratio according to the following formula: NS/NP ≥ (VOUT + VD1 × DMA AX) / (DMA AX × VIN_MIN) Where: NS/NP is the turns ratio (NS is the number of turns of the secondary winding, NP is the number of turns of the main winding), VOUT is the output voltage (5V), VD1 is the voltage drop across D1 (the typical voltage drop of a power Schottky diode is 0.5V), DMA AX is the minimum value of the maximum operating duty cycle (44%), VIN_MIN is the minimum input voltage (30V), for this example: NS/NP ≥ 0.395, when NP = 14 is selected, NS = 6. (4) The lower reset winding turns ratio (NR/NP) ensures that all the energy in the transformer can be returned to V+ during the off cycle at the maximum duty cycle. The following formula can be used to determine the reset winding turns ratio: NR ≤ NP × (1- DMAX\') / DMAX\' where NR / NP is the reset winding turns ratio, DMAX\' is the maximum value of the duty cycle (50%), and NR = 14. (5) The third winding turns ratio (NT / NP) is selected so that the minimum input voltage can provide the minimum operating voltage (13V) at VDD. The following formula can be used to calculate the turns ratio of the third winding: NP (VDDMIN + 0.7) / VIN_MIN≤NT≤NP (VDDMAX+0.7) / VIN_MAX where: VDDMIN is the minimum VDD power supply voltage (13V), VDDMAX is the maximum VDD power supply voltage (30V), VIN_MIN is the minimum input voltage (30V), VIN_MAX is the maximum input voltage (67V in this design), NP is the number of turns of the main winding, and NT is the number of turns of the third winding: NT=7 can be selected. (6) Select RSENSE according to the following formula: RSENSE ≤ VILIM / (NS × 1.2 × IOUT MAX / NP) where VILIM is the trigger threshold voltage of the current-sense comparator (0.465 V), NS / NP is the secondary-side turns ratio (5/14 in this example), IOUT MAX is the maximum DC output current (10 A in this example), and RSENSE is 90.4 mΩ. (7) When selecting an inductor, the peak ripple current (LIR) in the inductor should be between 10% and 20% of the maximum output current: L ≥ (V OUT + V D) (1 - D MIN) / (2 LIR × 275 kHz × I OUT UT MAX) where V D is the forward voltage drop of the output Schottky diode (0.5 V) and LIR is the ratio of the inductor ripple current to the DC output current. In this example, L is 4.01 μH. (8) The output filter capacitor capacity and ESR determine the output ripple. Selecting a low ESR capacitor is helpful to meet the ripple voltage requirements. Three 560 μF capacitors are selected in Figure 2.
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