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Time code terminal system based on single chip microcomputer and FPGA

  • 2014-03-05
  • 229.13KB
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Abstract: This paper describes in detail the design method of implementing a time code terminal system based on FPGA and single-chip microcomputer K. The system can be used to demodulate the international universal time format code IRIG code (B code for short), and generate various sampling and synchronization frequency signals. It can also be used as the time base and sampling and synchronization signal benchmark of other systems. Keywords: single-chip microcomputer; IRIG-B format code; FPGA; demodulation; control; interface

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