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FT51BQ-R

Description
Interface Development Tools FT51 DIP Module USB Bridging Eval
Categorysemiconductor    The embedded processor and controller   
File Size1MB,43 Pages
ManufacturerFTDI [Future Technology Devices International Ltd.]
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FT51BQ-R Overview

Interface Development Tools FT51 DIP Module USB Bridging Eval

FT51BQ-R Parametric

Parameter NameAttribute value
Product Category8-bit Microcontrollers - MCU
ManufacturerFTDI [Future Technology Devices International Ltd.]
RoHSDetails
Mounting StyleSMD/SMT
Package / CaseQFN-32
Core8051
Data Bus Width8 bit
Maximum Clock Frequency48 MHz
Program Memory Size16 kB
Data RAM Size8 kB
ADC Resolution8 bit
Operating Supply Voltage3.3 V, 5 V
Maximum Operating Temperature+ 85 C
PackagingReel
Analog Supply Voltage3.3 V
DAC Resolution8 bit
Data RAM TypeRAM
Height0.75 mm
I/O Voltage1.8 V, 2.5 V, 3.3 V
Interface TypeI2C, SPI, UART
Length6 mm
Minimum Operating Temperature- 40 C
Moisture SensitiveYes
Number of ADC Channels16 Channel
Number of Timers/Counters4 x 16 bit
ProductMCU
Program Memory TypeMulti-Time Program
Factory Pack Quantity3000
Supply Voltage - Max5.5 V
Supply Voltage - Min3 V
Watchdog TimersWatchdog Timer
Width6 mm
Unit Weight0.006653 oz
FT51A Advanced MCU with 8051 Compatible Core IC Datasheet
Version 1.5
D oc ument N o.: FT _000877
C learance N o.: FT DI#420
Future Technology Devices
International Ltd
.
FT51A
(Advanced Microcontroller with 8051
Compatible Core)
The FT51A is a multi-featured device that can be
targeted at a wide range of functions or
applications:
Industry compatible 8051 core running at a
maximum frequency of 48MHz.
8 KB of data memory
16 KB of multi-time programmable (MTP) memory
16 KB of shadow memory for fast read access by
the core.
USB 2.0 Full Speed hub controller allowing
cascading of multiple FT51A devices
USB 2.0 Full Speed device controller compatible to
FT12 series
Supports up to 8 bi-directional endpoints with 2 x
1 KB USB endpoint buffers
Max packet size is 504 bytes for USB isochronous
endpoint and 64 bytes for control / bulk / interrupt
endpoint
Double buffer scheme for any endpoint, increases
data transfer throughput
Fully integrated clock generation with no external
crystal required
Data transfer rates from 300 baud to 3M baud
(RS422, RS485, and RS232) at TTL levels
PWM Controller
UART interface support for 7 or 8 data bits, 1 or 2
stop bits and odd / even / mark / space / no parity
USB Battery Charger Detection allowing optimized
charging profile
Supports DMA operation
I
2
C Master & Slave functionality
SPI Master & Slave functionality
245 FIFO module provides a simple FIFO interface
to transmit and receive data
Timer and Watchdog
Up to 16 dedicated digital IO pins
Up to 16 multiplexed analogue / digital IO pins
Support ADC function on analogue IO pins
IO Mux control for maximum flexibility in pin
selection
Configurable IO pin output drive strength; 4 mA
(min) and 16 mA (max)
+5V Single Supply Operation
Internal 3.3V/1.8V voltage regulators
Integrated power-on-reset circuit
Low operating and suspend current; 20 mA
(active) and 150 uA (suspend)
Extended operating temperature range; -40 to
85⁰C
Available in compact Pb-free, RoHS compliant
packages:
48-pin WQFN
44-pin LQFP
32-pin WQFN
28-pin SSOP
N either the whole nor any part of the information c ontained in, or the produc t des c ribed in this manual, may be adapted or re produc ed in any
material or elec tronic form without the prior written c ons ent of the c opyright holder. T his product and its doc umentation are s up plied on an as-is
bas is and no warranty as to their s uitability for any partic ular purpose is either made or implied. Future T ec hno logy D evic es I nternational L td
will not ac c ept any c laim for damages hows oever aris ing as a res ult of us e or failure of this produc t. Y our s tatutory rights are not affec ted. T his
produc t or any variant of it is not intended for us e in any medic al applianc e , devic e or s ys tem in whic h the failure of the produc t might
reas onably be expected to res ult in pers onal injury. T his doc ument provides preliminary information that may be s ubjec t to c h ange without
notic e. N o freedom to us e patents or other intellectual p roperty rights is implied by the public ation of this doc ument. Future T echnology D evices
I nternational L td, U nit 1 , 2 Seaward P lace, C enturion Business P ark, G lasgow G 4 1 1 HH U nited Kingdom. Sc otland Registered Company N umber:
SC 1 3 6 6 4 0
Copyright © Future Technology Devices International Limited
1

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