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5V49EE903NLGI8

Description
VFQFPN-32, Reel
Categorylogic    logic   
File Size628KB,32 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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5V49EE903NLGI8 Overview

VFQFPN-32, Reel

5V49EE903NLGI8 Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeVFQFPN
package instructionVFQFPN-32
Contacts32
Manufacturer packaging codeNLG32P1
Reach Compliance Codecompliant
ECCN codeEAR99
Samacsys DescriptionVFQFP-N 5 X 5 NO LEAD
series5V
Input adjustmentMUX
JESD-30 codeS-XQCC-N32
JESD-609 codee3
length5 mm
Logic integrated circuit typePLL BASED CLOCK DRIVER
Humidity sensitivity level3
Number of functions1
Number of inverted outputs
Number of terminals32
Actual output times7
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Package body materialUNSPECIFIED
encapsulated codeHVQCCN
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.075 ns
Maximum seat height0.9 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width5 mm
minfmax200 MHz
Base Number Matches1
DATASHEET
EEPROM PROGRAMMABLE CLOCK GENERATOR
Description
The IDT5V49EE903 is a programmable clock generator
intended for high performance data-communications,
telecommunications, consumer, and networking
applications. There are four internal PLLs, each individually
programmable, allowing for four unique non-integer-related
frequencies. The frequencies are generated from a single
reference clock. The reference clock can come from one of
the two redundant clock inputs. Automatic or manual
switchover function allows any one of the redundant clocks
to be selected during normal operation.
The IDT5V49EE903 is in-system, programmable and can
be programmed through the use of I
2
C interface. An
internal EEPROM allows the user to save and restore the
configuration of the device without having to reprogram it on
power-up.
Each of the four PLLs has an 7-bit reference divider and a
12-bit feedback divider. This allows the user to generate
four unique non-integer-related frequencies. The PLL loop
bandwidth is programmable to allow the user to tailor the
PLL response to the application. For instance, the user can
tune the PLL parameters to minimize jitter generation or to
maximize jitter attenuation. Spread spectrum generation
and/or fractional divides are allowed on two of the PLLs.
There are a total of six 8-bit output dividers. The outputs are
connected to the PLLs via a switch matrix. The switch
matrix allows the user to route the PLL outputs to any
output bank. This feature can be used to simplify and
optimize the board layout. In addition, each output's slew
rate and enable/disable function is programmable.
IDT5V49EE903
Features
Four internal PLLs
Internal non-volatile EEPROM
Fast (400kHz) mode I
2
C serial interface
Input frequency range: 1 MHz to 200 MHz
Output frequency range: 4.9 kHz to 200 MHz
Reference crystal input with programmable linear load
capacitance
– Crystal frequency range: 8 MHz to 50 MHz
Each PLL has a 7-bit reference divider and a 12-bit
feedback-divider
8-bit output-divider blocks
Fractional division capability on one PLL
Two of the PLLs support spread spectrum generation
capability
I/O Standards:
– Outputs - 3.3 V LVTTL/ LVCMOS
– Inputs - 3.3 V LVTTL/ LVCMOS
Programmable slew rate control
Programmable loop bandwidth
Programmable output inversion to reduce bimodal jitter
Redundant clock inputs with auto and manual switchover
options
Individual output enable/disable
Power-down mode
3.3V core V
DD
Available in TSSOP and VFQFPN packages
-40 to +85 C Industrial Temp operation
IDT®
EEPROM PROGRAMMABLE CLOCK GENERATOR
1
IDT5V49EE903 REV RR 071015

5V49EE903NLGI8 Related Products

5V49EE903NLGI8 5V49EE903PGGI8 5V49EE903PGGI
Description VFQFPN-32, Reel TSSOP-28, Reel TSSOP-28, Tube
Brand Name Integrated Device Technology Integrated Device Technology Integrated Device Technology
Is it lead-free? Lead free Lead free Lead free
Is it Rohs certified? conform to conform to conform to
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code VFQFPN TSSOP TSSOP
package instruction VFQFPN-32 TSSOP-28 TSSOP-28
Contacts 32 28 28
Manufacturer packaging code NLG32P1 PGG28 PGG28
Reach Compliance Code compliant compliant compliant
ECCN code EAR99 EAR99 EAR99
series 5V 5V 5V
Input adjustment MUX MUX MUX
JESD-30 code S-XQCC-N32 R-PDSO-G28 R-PDSO-G28
JESD-609 code e3 e3 e3
length 5 mm 9.7 mm 9.7 mm
Logic integrated circuit type PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER
Humidity sensitivity level 3 1 1
Number of functions 1 1 1
Number of terminals 32 28 28
Actual output times 7 7 7
Maximum operating temperature 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C
Output characteristics 3-STATE 3-STATE 3-STATE
Package body material UNSPECIFIED PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code HVQCCN TSSOP TSSOP
Package shape SQUARE RECTANGULAR RECTANGULAR
Package form CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Certification status Not Qualified Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.075 ns 0.075 ns 0.075 ns
Maximum seat height 0.9 mm 1.2 mm 1.2 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 3 V 3 V 3 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V
surface mount YES YES YES
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
Terminal form NO LEAD GULL WING GULL WING
Terminal pitch 0.5 mm 0.65 mm 0.65 mm
Terminal location QUAD DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 5 mm 4.4 mm 4.4 mm
minfmax 200 MHz 200 MHz 200 MHz
Base Number Matches 1 1 1
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