CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
Electrical Specifications
PARAMETER
INPUT
V
OS
I
B
C
IN
I
OS
V
CM
CMRR
OUTPUT
V
OH
V
OL
V
S
= ±5V, V
SD
= 5V, R
L
= 2.3kΩ, T
A
= 25°C, unless otherwise specified.
CONDITION
MIN
TYP
MAX
UNIT
DESCRIPTION
Input Offset Voltage
Input Bias Current
Input Capacitance
Input Offset Current
Input Voltage Range
Common-mode Rejection Ratio
V
CM
= 0V, V
O
= 2.5V
-10
1
-5
5
4
mV
µA
pF
V
CM
= 0V, V
O
= 2.5V
-2.5
(V
S
-) - 0.1
0.5
2.5
(V
S
+) - 2.25
µA
V
dB
-5.1V < V
CM
< +2.75V
65
90
Output High Voltage
Output Low Voltage
V
IN
> 250mV
V
IN
> 250mV
V
SD
- 0.6
V
SD
- 0.4
GND + 0.25
GND + 0.5
V
V
DYNAMIC PERFORMANCE
t
pd
+
t
pd
-
SUPPLY
I
S
+
I
S
-
I
SD
Positive Analog Supply Current
Negative Analog Supply Current
Per comparator
Per comparator
12
7.5
5.5
0.9
55
80
13.5
8.5
6.5
1.2
mA
mA
mA
mA
dB
Positive Going Delay Time
Negative Going Delay Time
V
IN
= 1V
P-P
, V
OD
= 50mV
V
IN
= 1V
P-P
, V
OD
= 50mV
4
4
6
6
ns
ns
Digital Supply Current at No Load Per comparator, output high
Per comparator, output low
PSRR
LATCH
V
LH
V
LL
I
LH
I
LL
t
d
+
t
d
-
t
s
t
h
t
pw
(D)
Power Supply Rejection Ratio
Latch Input Voltage High
Latch Input Voltage Low
Latch Input Current High
Latch Input Current Low
Latch Disable to High Delay
Latch Disable to Low Delay
Minimum Setup Time
Minimum Hold Time
Minimum Latch Disable Pulse
Width
V
LH
= 3.0V
V
LL
= 0.3V
0.8
-30
-30
-18
-24
6
6
2
1
10
2.0
V
V
µA
µA
ns
ns
ns
ns
ns
2
EL5285
Typical Performance Curves
Supply Current vs Supply Voltage
14
12
10
I
S
(mA)
8
6
4
4.2
2
0
0
1
2
3
±V
S
(V)
Offset Voltage vs Temperature
2.5
2
1.5
V
OS
(mV)
1
0.5
0
-0.5
-50
IB (µA)
9
8
7
6
5
4
3
2
-30
-10
10
30
50
70
90
4
5
6
I
S
-
V
IN
=-50mV
R
L
=2.3kΩ
4.8
I
S
+
V
OH
(V)
4.6
5
Output High Voltage vs Temperature
4.4
4
-50
-30
-10
10
30
50
70
90
Temperature (°C)
Input Bias Current vs Temperature
1
-50
-30
-10
10
30
50
70
90
Temperature (°C)
Output Low Voltage vs Temperature
0.4
14
12
Supply Current (mA)
Temperature (°C)
Supply Current vs Temperature (per comparator)
I
S
+
10
8
6
4
2
I
S
-
0.3
V
OL
(V)
0.2
0.1
-50
-30
-10
10
30
50
70
90
0
-50
-30
-10
10
30
50
70
90
Temperature (°C)
Temperature (°C)
3
EL5285
Typical Performance Curves
(Continued)
4.2
4.1
Delay Time (ns)
4
3.9
3.8
3.7
3.6
Propagation Delay vs Overdrive
V
IN
=1V
STEP
V
S
=±5V
V
SD
=5V
R
L
=2.3kΩ
T
PD
+
Delay Time (ns)
Propagation Delay vs Supply Voltage
4.5
4.4
4.3
4.2
4.1
4
3.9
3.8
3.7
3.6
3.5
4
4.2
4.4
4.6
4.8
5
5.2
5.4
5.6
5.8
6
±V
S
(V)
Digital Supply Current vs Switching Frequency
(per comparator)
25
V
S
=±5V
V
SD
=5V
R
L
=2.3kΩ
V
S
=±5V
T
A
=25°C
R
L
=2.3kΩ
T
PD
-
T
PD
+
V
SD
=V
S
+
V
OD
=50mV
R
L
=2.2kΩ
T
PD
-
3.5
50 100 150 200 250 300 350 400 450 500 550 600
V
OD
(mV)
Propagation Delay vs Overdrive
V
IN
=3V
STEP
6.8
6.6
6.4
Delay Time (ns)
6.2
6
5.8
5.6
5.4
5.2
20
T
PD
+
I
SD
(mA)
15
V
SD
=5V
V
SD
=3V
T
PD
-
10
5
5
0.2
0
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
0
10
20
30
40
50
V
OD
(V)
Frequency (MHz)
Propagation Delay vs Source Resistance
V
IN
=1V
STEP
V
S
=±5V
V
SD
=5mV
V
OD
=50mV
R
L
=2.3kΩ
T
PD
+
T
PD
-
7.2
7
Delay Time (ns)
6.8
6.6
6.4
6.2
6
Propagation Delay vs Overdrive
V
IN
=5V
STEP
V
S
=±5V
V
SD
=5V
R
L
=2.3kΩ
Delay Time (ns)
16
14
12
10
8
6
4
T
PD
+
T
PD
-
5.8
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
V
OD
(V)
2
2.2 2.4 2.6
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
Source Resistance (kΩ)
4
EL5285
Typical Performance Curves
(Continued)
7.5
7
Delay Time (ns)
6.5
6
5.5
5
4.5
4
Propagation Delay vs Load Capacitance
V
IN
=1V
STEP
V
S
=±5V
V
SD
=5V
V
OD
=50mV
R
L
=2.3kΩ
T
PD
+
T
PD
-
Package Power Dissipation vs Ambient Temperature
JEDEC JESD51-3 Low Effective Thermal Conductivity
Test Board
0.9
0.8
Power Dissipation (W)
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
833mW
12
0
14
°C
/W
SO
0
10
20
30
40
50
60
70
80
90
100
0
25
50
75 85
100
125
C
LOAD
(pF)
Package Power Dissipation vs Ambient Temperature
JEDEC JESD51-7 High Effective Thermal Conductivity Test
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