TM
Application Specific Crystal Oscillator 5.0 x 3.2mm
3.3V HCSL Low Jitter 100MHz PCIe
®
2.0 XO
SQPCIE100
5.0 x 3.2mm Ceramic SMD
ASSP XO™ for Networking
Package:
Product Features
• Provides 100 MHz HCSL output for
interfacing to standard PCIe
®
devices
• Very low PCIe 2.0 jitter - 1.8ps RMS (typ.)
• Thicker crystal for improved reliability
• Pb-free & RoHS compliant
• Industrial temperature range
Recommended Land Pattern:
CREATED USING CADSTD LITE FREEWARE FROM WWW.CADSTD.COM. NON-COMMERCIAL USE ONLY.
Product Description
The SQPCIE100 3.3V crystal clock
oscillator achieves superb jitter for PCIe
®
1.0 & 2.0 applications. The output clock
signal, generated internally with a patented
oscillator design, is compatible with HCSL
logic levels. The device, available on tape
and reel, is contained in a 5.0 x 3.2mm
surface-mount ceramic package.
Pin Functions:
Pin
Function
1
2
3
4
5
6
OE Function
N/C
V
EE
OUT
OUT
V
CC
Applications
•
Server
• Network Switch/Router
• Telecom Switch
• Media Box
•
Graphics Card
• Host Bus Adapter
CREATED USING CADSTD LITE FREEWARE FROM WWW.CADSTD.COM. NON-COMMERCIAL USE ONLY.
*Extended high frequency power decoupling is recommended (see test circuit for minimum
recommendation). To ensure optimal performance, do not route RF traces beneath the
package.
Part Ordering Information:
SQPCIE100
SaRonix-eCera™ is a Pericom® Semiconductor company
•
US: +1-408-435-0800 TW: +886-3-4518888
11-0009
•
www.pericom.com
03/16/11
1
All specifications are subject to change without notice.
SQPCIE100
Rev 05
3.3V HCSL Low Jitter 100 MHz PCIe
®
2.0 XO
SQPCIE100
TM
Application Specific Crystal Oscillator 5.0 x 3.2mm
Electrical Performance
Parameter
Min.
Typ.
Max.
Units
Notes
Output Frequency
Supply Voltage
Supply Current, Output Enabled
Supply Current, Output Disabled
Frequency Stability
Operating Temperature Range
Output Logic 0, V
OL
Output Logic 1, V
OH
Output Load
Duty Cycle
Rise and Fall Time
Jitter, Phase RMS (1-σ)
Jitter, pk–pk
45
-40
-0.15
2.97
100
3.30
3.63
40
10
±50
+85
0.9
R
s
= 33Ω, R
p
= 50Ω, C
L
= 2pF
55
0.7
1.8
2.5
40
MHz
V
mA
mA
ppm
°C
V
V
Typ., HCSL Termination
%
ns
ps
ps
Measured 50% of waveform
Maximum measured from
V
OL
= 0.175V to V
OH
= 0.525V
As defined by PCI-SIG for PCIe
®
2.0
reference clock
100,000 random periods
See Note 1 below
Industrial
Notes:
1. Stability includes all combinations of operating temperature, load changes, rated input (supply) voltage changes, initial calibration tolerance (25°C),
aging (5 year at 40°C average effective ambient temperature), shock and vibration.
2. For specifications othere than those listed, please contact sales.
Output Enable / Disable Function
Parameter
Min.
Typ.
Max.
Units
Notes
Input Voltage (pin 1), Output Enable
Input Voltage (pin 1), Output Disable (low power standby)
Output Disable Delay
Output Enable Delay
0.7*V
DD
0.3*V
DD
200
2
V
V
ns
ms
or open
Outputs disabled to Hi-Z
Absolute Maximum Ratings
Parameter
Min.
Typ.
Max.
Units
Notes
Storage Temperature
-55
+125
°C
For the latest product information visit:
http://www.pericom.com/products/timing/oscillators/SQPCIE100/
For test circuit go to:
http://www.pericom.com/pdf/sre/tc_hcsl.pdf
For soldering reflow profile and reliability test ratings go to:
http://www.pericom.com/pdf/sre/reflow.pdf
For tape and reel information go to:
http://www.pericom.com/pdf/sre/tr_5032_xo.pdf
SaRonix-eCera™ is a Pericom® Semiconductor company
•
US: +1-408-435-0800 TW: +886-3-4518888
11-0009
•
www.pericom.com
03/16/11
2
All specifications are subject to change without notice.
SQPCIE100
Rev 05
Domestic Chip Exchange
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