NJW4814
Dual H-Bridge Driver with Boost Converter
GENERAL DESCRIPTION
The
NJW4814
is a dual H-bridge driver with boost converter IC.
It can boost the output voltage from Li-ion battery and/or a 5V power
supply and drives a piezo device by two H- bridge drivers.
48ms of internal fixed soft start function of the boost circuit sets a limit
to startup current.
The dual H-bridge drivers have independent signal inputs and a fault
output function, therefore the NJW4814 improves controllability from a
microcomputer.
The input frequency of H-bridge driver is up to 300kHz.
■
PACKAGE OUTLINE
NJW4814MLE
FEATURES
Boost Converter Block
Output Switch Voltage
Switching Current
PWM Control
Operating Voltage Range
Oscillation Frequency Range
Soft Start Function
Over Current Protection
Over Voltage Protection
Internal 2 Channel H-Bridge
Each Channel Operates Individually
Over Current Protection
Operating Voltage Range
Switching Frequency
Output Shut Down Control
Fault Indicator Output
40V max.
1.5A min.
2.7 to 5.5V
380k to 1MHz
48ms typ.
H-Bridge Driver Block
300mA typ.
7.0 to 35V
300kHz max.
Under Voltage Lockout
Built-in Thermal Shutdown
Standby Function
Package Outline
NJW4814MLE : EQFN24-LE
Ver.2015-04-07
-1-
NJW4814
PIN CONFIGURATION
VDD_HB
OUTB2
SW 19
PGND 20
RADJ 21
FB 22
RT 23
GND 24
1
IN-
Exposed PAD on
backside connect to GND
2
VDD_SW
3
STBYb
4
SHDNAb
5
SHDNBb
6
INA1
OUTB1
OUTA1
PGND
VOVP
18 17 16 15 14 13
12 OUTA2
11 PGND
10 FLT
9 INB2
8 INB1
7 INA2
PIN FUNCTION
1. IN-
2. VDD_SW
3. STBYb
4. SHDNAb
5. SHDNBb
6. INA1
7. INA2
8. INB1
9. INB2
10. FLT
11. PGND
12. OUTA2
13. OUTA1
14. PGND
15. OUTB1
16. VDD_HB
17. VOVP
18. OUTB2
19. SW
20. PGND
21. RADJ
22. FB
23. RT
24. GND
< Top View>
NJW4814MLE
-2-
Ver.2015-04-07
NJW4814
BLOCK DIAGRAM
UVLO
STBYb
Standby
ON/OFF
VDD_SW
FB
PWM
ERR.AMP
IN-
Oscillator
Buffer
SW
RADJ
Vref 1.0V
Soft Start
Thermal
Shutdown
OVP
OCP
VOVP
RT
VDD_HB
FLT
UVLO
High Side
Gate Driver
High Side
Gate Driver
OUTA1
OUTA2
INA1
SHDNAb
Control
Logic
Low Side
Gate Driver
Low Side
Gate Driver
INA2
Control
Logic
OCP
High Side
Gate Driver
High Side
Gate Driver
OUTB1
OUTB2
INB1
SHDNBb
Control
Logic
Low Side
Gate Driver
Low Side
Gate Driver
INB2
Control
Logic
GND
PGND
Ver.2015-04-07
-3-
NJW4814
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
Boost Converter Block
Supply Voltage
SW pin Voltage
RADJ pin Voltage
IN- pin Voltage
STBYb pin Voltage
VOVP pin Voltage (*2)
H-Bridge Driver Block
Supply Voltage
SHDNAb, SHDNBb pin
Voltage
INA1, INA2, INB1, INB2 pin
Voltage
General
FLT pin Voltage
Power Dissipation
Junction Temperature Range
Operating Temperature Range
Storage Temperature Range
MAXIMUM RATINGS
(Ta=25°C)
UNIT
V
DD_SW
V
SW
V
RADJ
V
IN-
V
STBYb
V
OVP
-0.3 to +6
-0.3 to +40
-0.3 to +6 (*1)
-0.3 to +6 (*1)
-0.3 to +6 (*1)
-0.3 to +40
V
V
V
V
V
V
V
DD_HB
V
SHDNAb
V
SHDNBb
V
INA1
, V
INA2
V
INB1
, V
INB2
-0.3 to +40
-0.3 to +6 (*1)
-0.3 to +6 (*1)
V
V
V
V
FLT
P
D
T
j
T
opr
T
stg
-0.3 to +6
910 (*3)
2,100 (*4)
-40 to +150
-40 to +85
-40 to +150
V
mW
C
C
C
(*1): When Supply voltage is less than +6V, the absolute maximum voltage is equal to the Supply voltage.
(*2): VOVP pin should be connected to VDD_HB pin.
(*3): Mounted on glass epoxy board. (101.5×114.5×1.6mm: based on EIA/JEDEC standard, 2Layers FR-4, with Exposed Pad)
(*4): Mounted on glass epoxy board. (101.5×114.5×1.6mm: based on EIA/JEDEC standard, 4Layers FR-4, with Exposed Pad)
(For 4Layers: Applying 99.5×99.5mm inner Cu area and a thermal via hole to a board based on JEDEC standard JESD51-5)
RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
Boost Converter Block
Supply Voltage
STBYb pin Voltage
Timing Resistor
Oscillating Frequency
H-Bridge Driver Block
Supply Voltage
Output Switch DC Current
SHDNAb, SHDNBb pin
Voltage
IN1A, IN1B, IN2A, IN2B pin
Voltage
FLT pin Voltage
MIN.
TYP.
MAX.
UNIT
V
DD_SW
V
STBYb
R
T
f
OSC
V
DD_HB
I
OM
V
SHDNAb
V
SHDNBb
V
INA1
, V
INA2
V
INB1
, V
INB2
V
FLT
2.7
0
68
380
7
0
0
0
0
－
–
100
700
–
20
–
–
–
5.5
V
DD_SW
200
1,000
35
–
V
DD_SW
V
DD_SW
5.5
V
V
k
kHz
V
mA
V
V
V
-4-
Ver.2015-04-07
NJW4814
ELECTRICAL CHARACTERISTICS
Boost Converter Block
(Unless otherwise noted, V
DD_SW
=V
STBYb
=3.7V, R
T
=100k , Ta=25 C)
PARAMETER
Under Voltage Lockout Block
UVLO Release Voltage
UVLO Operate Voltage
UVLO Hysteresis Voltage
Soft Start Block
Soft Start Time
Oscillator Block
Oscillation Frequency
Oscillation Frequency
deviation (Supply voltage)
Oscillation Frequency
deviation (Temperature)
Error Amplifier Block
Reference Voltage
Input Bias Current
IN- pin Clamp Voltage
RADJ pin
FET ON Resistance
RADJ pin
FET Leak Current
PWM Comparate Block
Maximum Duty Cycle
Output Block
Switching FET
ON Resistance
Switching Current Limit
Switching FET Leak Current
Overvoltage Protection Block
OVP Operate Voltage
OVP Release Voltage
OVP Hysteresis Voltage
OVP pin Input Current 1
OVP pin Input Current 2
OVP pin Leak Current
V
B
I
B
V
CLIN-
R
ON_RADJ
I
LEAK_RADJ
Short IN- and FB,
Measuring IN- Pin
V
B
=1.0V
V
STBYb
=0V, V
DD_SW
=5.5V,
I
CLIN-
=10 A
I
RADJ
=10mA
V
STBYb
=0V, V
RADJ
=3.3V
-1.0%
-0.1
4.8
–
–
1.00
–
5.2
6
–
+1.0%
+0.1
5.6
12
1
A
V
A
V
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
V
RUVLO_SW
V
DUVLO_SW
V
UVLO_SW
V
RUVLO_SW
- V
DUVLO_SW
2.1
2.0
–
2.4
2.2
0.2
2.7
2.5
–
V
V
V
T
SS
V
B
=0.95V
34
48
60
ms
f
OSC
f
DV
f
DT
R
T
=100k
V
DD_SW
=3.0V to 5.5V
Ta= -40 C to +85 C
630
–
–
700
1
3
770
–
–
kHz
%
%
M
AX
D
UTY
V
IN-
=0.9V
90
93
98
%
R
ON_SW
I
LMT_SW
I
LEAK_SW
I
SW
=100mA
V
STBYb
=0V, V
SW
=40V
–
1.5
–
0.6
2
–
1.2
–
1
A
A
V
DOVP
V
ROVP
ΔV
OVP
I
OVP1
I
OVP2
I
OVP_LEAK
V
DOVP
-V
ROVP
V
OVP
= V
DD_HB
=35V,
OVP Release
V
OVP
= V
DD_HB
=40V,
OVP Operate
V
STBYb
=0V,
V
OVP
= V
DD_HB
=40V
36
31
–
–
1,200
–
38
33
5
60
2,400
–
40
35
–
120
4,000
1
V
V
V
A
A
A
Ver.2015-04-07
-5-
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