TISP4070H3BJ THRU TISP4095H3BJ, TISP4125H3BJ THRU TISP4200H3BJ,
TISP4240H3BJ THRU TISP4400H3BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
Copyright © 1999, Power Innovations Limited, UK
NOVEMBER 1997 - REVISED MARCH 1999
TELECOMMUNICATION SYSTEM 100 A 10/1000 OVERVOLTAGE PROTECTORS
q
q
8 kV 10/700, 200 A 5/310 ITU-T K20/21 rating
Ion-Implanted Breakdown Region
Precise and Stable Voltage
Low Voltage Overshoot under Surge
DEVICE
‘4070
‘4080
‘4095
‘4125
‘4145
‘4165
‘4180
‘4200
‘4240
‘4265
‘4300
‘4350
‘4400
V
DRM
V
58
65
75
100
120
135
145
155
180
200
230
275
300
V
(BO)
V
70
80
95
125
145
165
180
200
240
265
300
350
400
SMBJ PACKAGE
(TOP VIEW)
R(B)
1
2
T(A)
MDXXBG
device symbol
T
SD4XAA
R
Terminals T and R correspond to the
alternative line designators of A and B
q
Rated for International Surge Wave Shapes
WAVE SHAPE
2/10 µs
8/20 µs
10/160 µs
10/700 µs
10/560 µs
10/1000 µs
STANDARD
GR-1089-CORE
IEC 61000-4-5
FCC Part 68
ITU-T K20/21
FCC Part 68
GR-1089-CORE
I
TSP
A
500
300
250
200
160
100
q
q
Low Differential Capacitance . . . 67 pF max.
UL Recognized, E132482
description
These devices are designed to limit overvoltages on the telephone line. Overvoltages are normally caused by
a.c. power system or lightning flash disturbances which are induced or conducted on to the telephone line. A
single device provides 2-point protection and is typically used for the protection of 2-wire telecommunication
equipment (e.g. between the Ring and Tip wires for telephones and modems). Combinations of devices can
be used for multi-point protection (e.g. 3-point protection between Ring, Tip and Ground).
The protector consists of a symmetrical voltage-triggered bidirectional thyristor. Overvoltages are initially
clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to
crowbar into a low-voltage on state. This low-voltage on state causes the current resulting from the
overvoltage to be safely diverted through the device. The high crowbar holding current prevents d.c. latchup
as the diverted current subsides.
PRODUCT
INFORMATION
1
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
TISP4070H3BJ THRU TISP4095H3BJ, TISP4125H3BJ THRU TISP4200H3BJ,
TISP4240H3BJ THRU TISP4400H3BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
This TISP4xxxH3BJ range consists of thirteen voltage variants to meet various maximum system voltage
levels (58 V to 275 V). They are guaranteed to voltage limit and withstand the listed international lightning
surges in both polarities. These high (H) current protection devices are in a plastic package SMBJ (JEDEC
DO-214AA with J-bend leads) and supplied in embossed carrier reel pack. For alternative voltage and holding
current values, consult the factory. For lower rated impulse currents in the SMB package, the 50 A 10/1000
TISP4xxxM3BJ series is available.
absolute maximum ratings, T
A
= 25°C (unless otherwise noted)
RATING
‘4070
‘4080
‘4095
‘4125
‘4145
‘4165
Repetitive peak off-state voltage, (see Note 1)
‘4180
‘4200
‘4240
‘4265
‘4300
‘4350
‘4400
Non-repetitive peak on-state pulse current (see Notes 2, 3 and 4)
2/10 µs (GR-1089-CORE, 2/10 µs voltage wave shape)
8/20 µs (IEC 61000-4-5, 1.2/50 µs voltage, 8/20 current combination wave generator)
10/160 µs (FCC Part 68, 10/160 µs voltage wave shape)
5/200 µs (VDE 0433, 10/700 µs voltage wave shape)
0.2/310 µs (I3124, 0.5/700 µs voltage wave shape)
5/310 µs (ITU-T K20/21, 10/700 µs voltage wave shape)
5/310 µs (FTZ R12, 10/700 µs voltage wave shape)
10/560 µs (FCC Part 68, 10/560 µs voltage wave shape)
10/1000 µs (GR-1089-CORE, 10/1000 µs voltage wave shape)
Non-repetitive peak on-state current (see Notes 2, 3 and 5)
20 ms (50 Hz) full sine wave
16.7 ms (60 Hz) full sine wave
1000 s 50 Hz/60 Hz a.c.
Initial rate of rise of on-state current,
Junction temperature
Storage temperature range
NOTES: 1.
2.
3.
4.
5.
Exponential current ramp, Maximum ramp value < 200 A
di
T
/dt
T
J
T
stg
I
TSM
55
60
2.1
400
-40 to +150
-65 to +150
A/µs
°C
°C
A
I
TSP
500
300
250
220
200
200
200
160
100
A
V
DRM
SYMBOL
VALUE
± 58
± 65
± 75
±100
±120
±135
±145
±155
±180
±200
±230
±275
±300
V
UNIT
See Applications Information and Figure 10 for voltage values at lower temperatures.
Initially the TISP4xxxH3BJ must be in thermal equilibrium with T
J
= 25°C.
The surge may be repeated after the TISP4xxxH3BJ returns to its initial conditions.
See Applications Information and Figure 11 for current ratings at other temperatures.
EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. See Figure 8 for the current ratings at other durations. Derate current values at -0.61 %/°C for ambient temperatures
above 25 °C
PRODUCT
2
INFORMATION
TISP4070H3BJ THRU TISP4095H3BJ, TISP4125H3BJ THRU TISP4200H3BJ,
TISP4240H3BJ THRU TISP4400H3BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
electrical characteristics for the T and R terminals, T
A
= 25°C (unless otherwise noted)
PARAMETER
I
DRM
Repetitive peak off-
state current
V
D
= V
DRM
TEST CONDITIONS
T
A
= 25°C
T
A
= 85°C
‘4070
‘4080
‘4095
‘4125
‘4145
‘4165
V
(BO)
Breakover voltage
dv/dt = ±750 V/ms,
R
SOURCE
= 300
Ω
‘4180
‘4200
‘4240
‘4265
‘4300
‘4350
‘4400
‘4070
‘4080
‘4095
‘4125
dv/dt
≤
±1000 V/µs, Linear voltage ramp,
V
(BO)
Impulse breakover
voltage
Maximum ramp value = ±500 V
di/dt = ±20 A/µs, Linear current ramp,
Maximum ramp value = ±10 A
‘4145
‘4165
‘4180
‘4200
‘4240
‘4265
‘4300
‘4350
‘4400
I
(BO)
V
T
I
H
dv/dt
I
D
Breakover current
On-state voltage
Holding current
Critical rate of rise of
off-state voltage
Off-state current
dv/dt = ±750 V/ms,
R
SOURCE
= 300
Ω
±0.15
±0.15
±5
T
A
= 85°C
V
d
= 1 V rms, V
D
= 0,
‘4070 thru ‘4095
‘4125 thru ‘4200
‘4240 thru ‘4400
f = 100 kHz,
V
d
= 1 V rms, V
D
= -1 V
‘4070 thru ‘4095
‘4125 thru ‘4200
‘4240 thru ‘4400
C
off
Off-state capacitance
f = 100 kHz,
V
d
= 1 V rms, V
D
= -2 V
‘4070 thru ‘4095
‘4125 thru ‘4200
‘4240 thru ‘4400
f = 100 kHz,
V
d
= 1 V rms, V
D
= -50 V
‘4070 thru ‘4095
‘4125 thru ‘4200
‘4240 thru ‘4400
f = 100 kHz,
(see Note 6)
NOTE
6: To avoid possible voltage clipping, the ‘4125 is tested with V
D
= -98 V.
V
d
= 1 V rms, V
D
= -100 V
‘4125 thru ‘4200
‘4240 thru ‘4400
145
80
70
130
71
60
120
65
55
62
30
24
28
22
±10
170
90
84
150
79
67
140
74
62
73
35
28
33
26
pF
I
T
= ±5 A, t
W
= 100 µs
I
T
= ±5 A, di/dt = +/-30 mA/ms
Linear voltage ramp, Maximum ramp value < 0.85V
DRM
V
D
= ±50 V
f = 100 kHz,
MIN
TYP
MAX
±5
±10
±70
±80
±95
±125
±145
±165
±180
±200
±240
±265
±300
±350
±400
±78
±88
±103
±134
±154
±174
±189
±210
±250
±276
±311
±362
±413
±0.6
±3
±0.6
A
V
A
kV/µs
µA
V
V
UNIT
µA
PRODUCT
INFORMATION
3
TISP4070H3BJ THRU TISP4095H3BJ, TISP4125H3BJ THRU TISP4200H3BJ,
TISP4240H3BJ THRU TISP4400H3BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
thermal characteristics
PARAMETER
TEST CONDITIONS
EIA/JESD51-3 PCB, I
T
= I
TSM(1000)
,
R
θJA
Junction to free air thermal resistance
T
A
= 25 °C, (see Note 7)
265 mm x 210 mm populated line card,
4-layer PCB, I
T
= I
TSM(1000)
, T
A
= 25 °C
NOTE
50
MIN
TYP
MAX
113
°C/W
UNIT
7: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
PARAMETER MEASUREMENT INFORMATION
+i
I
TSP
Quadrant I
Switching
Characteristic
I
TSM
I
T
V
T
I
H
V
(BO)
I
(BO)
-v
I
DRM
V
DRM
V
D
I
D
I
D
V
D
V
DRM
I
DRM
+v
I
(BO)
I
H
V
(BO)
V
T
I
T
I
TSM
Quadrant III
Switching
Characteristic
I
TSP
-i
PMXXAAB
Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR T AND R TERMINALS
ALL MEASUREMENTS ARE REFERENCED TO THE R TERMINAL
PRODUCT
4
INFORMATION
TISP4070H3BJ THRU TISP4095H3BJ, TISP4125H3BJ THRU TISP4200H3BJ,
TISP4240H3BJ THRU TISP4400H3BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
TYPICAL CHARACTERISTICS
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
100
V
D
= ±50 V
Normalised Breakover Voltage
10
|I
D
| - Off-State Current - µA
TCHAG
1.10
NORMALISED BREAKOVER VOLTAGE
vs
JUNCTION TEMPERATURE
TC4HAF
1.05
1
0·1
1.00
0·01
0·001
-25
0
25
50
75
100 125
T
J
- Junction Temperature - °C
150
0.95
-25
0
25
50
75
100 125
T
J
- Junction Temperature - °C
150
Figure 2.
ON-STATE CURRENT
vs
ON-STATE VOLTAGE
200
150
100
70
I
T
- On-State Current - A
50
40
30
20
15
10
7
5
4
3
2
1.5
1
0.7
'4125
THRU
'4200
T
A
= 25 °C
t
W
= 100 µs
Normalised Holding Current
Figure 3.
NORMALISED HOLDING CURRENT
vs
JUNCTION TEMPERATURE
TC4HAD
TC4HAC
2.0
1.5
1.0
0.9
0.8
0.7
0.6
0.5
0.4
'4240
THRU
'4400
1
'4070
THRU
'4095
1.5
2
3
4 5
V
T
- On-State Voltage - V
7
10
-25
0
25
50
75
100 125
T
J
- Junction Temperature - °C
150
Figure 4.
Figure 5.
PRODUCT
INFORMATION
5
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