ATMEGA644PV-10PQ datasheet, PDF

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ATMEGA644PV-10PQ: Description8-bit microcontrollers - mcu avr 64kb, 2kb EE 10mhz 4kb sram, 1.8V; Categorysemiconductor Other integrated circuit (IC); File Size9MB，440 Pages; ManufacturerAtmel (Microchip); Environmental Compliance

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ATMEGA644PV-10PQ Overview

8-bit microcontrollers - mcu avr 64kb, 2kb EE 10mhz 4kb sram, 1.8V

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Features

•

High-performance, Low-power Atmel

AVR

8-bit Microcontroller

•

Advanced RISC Architecture

– 131 Powerful Instructions – Most Single-clock Cycle Execution

– 32 × 8 General Purpose Working Registers

– Fully Static Operation

– Up to 20 MIPS Throughput at 20 MHz

– On-chip 2-cycle Multiplier

High Endurance Non-volatile Memory segments

– 16K/32K/64K Bytes of In-System Self-programmable Flash program memory

– 512B/1K/2K Bytes EEPROM

– 1K/2K/4K Bytes Internal SRAM

– Write/Erase Cycles: 10,000 Flash/ 100,000 EEPROM

– Data retention: 20 years at 85°C/100 years at 25°C

(1)

– Optional Boot Code Section with Independent Lock Bits

In-System Programming by On-chip Boot Program

True Read-While-Write Operation

– Programming Lock for Software Security

JTAG (IEEE std. 1149.1 Compliant) Interface

– Boundary-scan Capabilities According to the JTAG Standard

– Extensive On-chip Debug Support

– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface

Peripheral Features

– Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes

– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode

– Real Time Counter with Separate Oscillator

– Six PWM Channels

– 8-channel, 10-bit ADC

Differential mode with selectable gain at 1×, 10× or 200×

– Byte-oriented Two-wire Serial Interface

– Two Programmable Serial USART

– Master/Slave SPI Serial Interface

– Programmable Watchdog Timer with Separate On-chip Oscillator

– On-chip Analog Comparator

– Interrupt and Wake-up on Pin Change

Special Microcontroller Features

– Power-on Reset and Programmable Brown-out Detection

– Internal Calibrated RC Oscillator

– External and Internal Interrupt Sources

– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and

Extended Standby

I/O and Packages

– 32 Programmable I/O Lines

– 40-pin PDIP, 44-lead TQFP, 44-pad VQFN/QFN/MLF (ATmega164P/324P/644P)

– 44-pad DRQFN (

ATmega164P

)

Operating Voltages

– 1.8V - 5.5V for ATmega164P/324P/644PV

– 2.7V - 5.5V for ATmega164P/324P/644P

Speed Grades

– ATmega164P/324P/644PV: 0 - 4 MHz @ 1.8V - 5.5V, 0 - 10 MHz @ 2.7V - 5.5V

– ATmega164P/324P/644P: 0 - 10 MHz @ 2.7V - 5.5V, 0 - 20 MHz @ 4.5V - 5.5V

Power Consumption at 1 MHz, 1.8V, 25°C for ATmega164P/324P/644PV

– Active: 0.4 mA

– Power-down Mode: 0.1 µA

– Power-save Mode: 0.6 µA (Including 32 kHz RTC)

•

8-bit

Microcontroller

with

16K/32K/64K

Bytes In-System

Programmable

Flash

ATmega164P/V

ATmega324P/V

ATmega644P/V

•

Note:

1. See

”Data Retention” on page 8.

8011O–AVR–07/10

ATmega164P/324P/644P

The ATmega164P/324P/644P provides the following features: 16K/32K/64K bytes of In-System

Programmable Flash with Read-While-Write capabilities, 512B/1K/2K bytes EEPROM,

1K/2K/4K bytes SRAM, 32 general purpose I/O lines, 32 general purpose working registers,

Real Time Counter (RTC), three flexible Timer/Counters with compare modes and PWM, 2

USARTs, a byte oriented 2-wire Serial Interface, a 8-channel, 10-bit ADC with optional differen-

tial input stage with programmable gain, programmable Watchdog Timer with Internal Oscillator,

an SPI serial port, IEEE std. 1149.1 compliant JTAG test interface, also used for accessing the

On-chip Debug system and programming and six software selectable power saving modes. The

Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt sys-

tem to continue functioning. The Power-down mode saves the register contents but freezes the

Oscillator, disabling all other chip functions until the next interrupt or Hardware Reset. In Power-

save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base

while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all

I/O modules except Asynchronous Timer and ADC, to minimize switching noise during ADC

conversions. In Standby mode, the Crystal/Resonator Oscillator is running while the rest of the

device is sleeping. This allows very fast start-up combined with low power consumption. In

Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue to run.

The device is manufactured using Atmel’s high-density nonvolatile memory technology. The On-

chip ISP Flash allows the program memory to be reprogrammed in-system through an SPI serial

interface, by a conventional nonvolatile memory programmer, or by an On-chip Boot program

running on the AVR core. The boot program can use any interface to download the application

program in the application Flash memory. Software in the Boot Flash section will continue to run

while the Application Flash section is updated, providing true Read-While-Write operation. By

combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip,

the Atmel ATmega164P/324P/644P is a powerful microcontroller that provides a highly flexible

and cost effective solution to many embedded control applications.

The ATmega164P/324P/644P AVR is supported with a full suite of program and system devel-

opment tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit

emulators, and evaluation kits.

2.2

Comparison Between ATmega164P, ATmega324P and ATmega644P

Table 2-1.

Device

ATmega164P

ATmega324P

ATmega644P

Differences between ATmega164P and ATmega644P

Flash

16 Kbyte

32 Kbyte

64 Kbyte

EEPROM

512 Bytes

1 Kbyte

2 Kbyte

RAM

1 Kbyte

2 Kbyte

4 Kbyte

8011O–AVR–07/10

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