EEWORLDEEWORLDEEWORLD

Part Number

Search
 PDF

DIP1998SD021823BD

Description
Array/Network Resistor, Bussed, 0.1W, 182000ohm, 100V, 0.1% +/-Tol, -50,50ppm/Cel, 8025,
CategoryPassive components    The resistor   
File Size334KB,3 Pages
ManufacturerTT Electronics plc
Websitehttp://www.ttelectronics.com/
Download Datasheet Parametric View All

DIP1998SD021823BD Overview

Array/Network Resistor, Bussed, 0.1W, 182000ohm, 100V, 0.1% +/-Tol, -50,50ppm/Cel, 8025,

DIP1998SD021823BD Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Objectid791819559
Reach Compliance Codecompliant
Country Of OriginUSA
ECCN codeEAR99
YTEOL5.1
structureWelded
JESD-609 codee0
Lead length3.429 mm
lead spacing2.54 mm
Network TypeBussed
Number of terminals16
Maximum operating temperature150 °C
Minimum operating temperature-55 °C
Package height2.032 mm
Package length20.32 mm
Package formDIP
Package width6.35 mm
Rated power dissipation(P)0.1 W
resistance182000 Ω
Resistor typeARRAY/NETWORK RESISTOR
series1900
size code8025
Temperature Coefficient50 ppm/°C
Terminal surfaceTin/Lead (Sn60Pb40)
Tolerance0.1%
Operating Voltage100 V
EEWORLD University ---- 2018 PSDS Seminar Series - (1) Overview of Resonant Converter Topologies
2018 PSDS Seminar Series - (1) Overview of Resonant Converter Topologies : https://training.eeworld.com.cn/course/4470...
hi5 Power technology
A sophomore student who has just learned FPGA for a while and wants to practice something
I want to do something based on FPGA design, but I don’t have a good direction. I hope you can give me some suggestions. Thank you....
阿宝阿阿宝 FPGA/CPLD
ZTE's 7nm chip mass production still needs time to catch up with high-end chip track
Source: Feixiang.comOn October 11, news that ZTE's self-developed 7-nanometer chip had been commercially available attracted outside attention. According to media reports, ZTE Vice President Li Hui re...
eric_wang Domestic Chip Exchange
How to distinguish between active and passive buzzers?
[i=s]This post was last edited by fish001 on 2018-8-28 22:27[/i] [size=4] A small buzzer currently sold on the market is widely used in various electrical equipment, electronic production, and circuit...
fish001 Analogue and Mixed Signal
Comparison of Three Synchronous Designs in FPGA
...
至芯科技FPGA大牛 FPGA/CPLD
Class D Amplifier Design Example
Data introduction: Using switching mode to achieve low-frequency power amplification (i.e. Class D amplification) is to improve efficiency http://www.cndzz.com/user/show/1444.htm...
maker Analog electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号