MDDSA2E474J datasheet, PDF - EEWORLD Datasheet

MDDSA2E474J: DescriptionCAPACITOR, METALLIZED FILM, POLYESTER, 250V, 0.47uF, THROUGH HOLE MOUNT, RADIAL LEADED; CategoryPassive components capacitor; File Size182KB，2 Pages; ManufacturerHitachi （Renesas ）; Websitehttp://www.renesas.com/eng/

Download Datasheet Parametric View All

MDDSA2E474J Overview

CAPACITOR, METALLIZED FILM, POLYESTER, 250V, 0.47uF, THROUGH HOLE MOUNT, RADIAL LEADED

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	1938652951
package instruction	, 7122
Reach Compliance Code	unknown
ECCN code	EAR99
capacitance	0.47 µF
Capacitor type	FILM CAPACITOR
dielectric materials	POLYESTER
high	13.5 mm
length	18 mm
Manufacturer's serial number	MDDSA
Installation features	THROUGH HOLE MOUNT
negative tolerance	5%
Number of terminals	2
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package shape	RECTANGULAR PACKAGE
Package form	DIP
positive tolerance	5%
Rated (DC) voltage (URdc)	250 V
series	MDDSA(2E)
size code	7122
surface mount	NO
Terminal pitch	15 mm
Terminal shape	WIRE
width	5.5 mm

Electronic Components Table: http://www.hnsmd.com/component/16.asp Very comprehensive...; fighting Analog electronics

EEWORLD University Hall----Live Replay: Protecting Clean Water Sources-ADI Water Quality Monitoring Solutions: Live Replay: Protecting Clean Water Sources - ADI Water Quality Monitoring Solution : https://training.eeworld.com.cn/course/5836With the country's investment in environmental protection, the demand f...; hi5 Integrated technical exchanges

Share: How to convert C program from floating point to fixed point: [size=4]This is a C language program for low-pass filtering of speech signals (0.3~3.4kHz). The cutoff frequency of the low-pass filter is 800Hz, and the filter uses a 19-point finite impulse response...; Jacktang DSP and ARM Processors

MicroPython major historical versions: MicroPython major historical versions1.0，2014-5-4 1.1，2014-6-13 1.2，2014-7-14 1.3，2014-8-13 1.4，2015-3-30 1.5，2015-8-21 1.6，2016-2-1 1.7，2016-4-11 1.8，2016-5-4 1.9，2017-5-26 1.10，2019-1-25 1.11，2019-5...; dcexpert MicroPython Open Source section

Hello, second half of 2020: In a blink of an eye, half a year has passed in 2020~ Today my sister-in-law complained that I have been at home directly from winter vacation to summer vacation, and have been washing dishes at home ...; okhxyyo Talking

SignalTap II integrated assign statement problem: [size=14px]I directly input the crystal oscillator clock signal clk into the FPGA and use the statement assign clk_out = clk to output it to other ICs for use. When simulating with signaltap II, I can...; 平漂流 FPGA/CPLD

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components