EEWORLDEEWORLDEEWORLD

Part Number

Search
 PDF

TLE2161IDG4

Description
JFET-Input High-Output-Drive Low-Power Decompensated Operational Amplifier 8-SOIC
CategoryAnalog mixed-signal IC    Amplifier circuit   
File Size1MB,33 Pages
ManufacturerTexas Instruments
Websitehttp://www.ti.com.cn/
Environmental Compliance
Stay tuned Parametric Compare

TLE2161IDG4 Online Shopping

Suppliers Part Number Price MOQ In stock  
TLE2161IDG4 - - View Buy Now

TLE2161IDG4 Overview

JFET-Input High-Output-Drive Low-Power Decompensated Operational Amplifier 8-SOIC

TLE2161IDG4 Parametric

Parameter NameAttribute value
Brand NameTexas Instruments
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerTexas Instruments
Parts packaging codeSOIC
package instructionSOP, SOP8,.25
Contacts8
Reach Compliance Codecompliant
ECCN codeEAR99
Factory Lead Time6 weeks
Amplifier typeOPERATIONAL AMPLIFIER
ArchitectureVOLTAGE-FEEDBACK
Maximum average bias current (IIB)0.004 µA
Maximum bias current (IIB) at 25C0.000003 µA
Minimum Common Mode Rejection Ratio65 dB
Nominal Common Mode Rejection Ratio82 dB
frequency compensationYES (AVCL>=5)
Maximum input offset current (IIO)0.002 µA
Maximum input offset voltage4400 µV
JESD-30 codeR-PDSO-G8
JESD-609 codee4
length4.9 mm
low-biasYES
low-dissonanceNO
micropowerYES
Humidity sensitivity level1
Negative supply voltage upper limit-19 V
Nominal Negative Supply Voltage (Vsup)-5 V
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP8,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingTUBE
Peak Reflow Temperature (Celsius)260
powerNO
power supply+-3.5/+-18/7/36 V
Programmable powerNO
Certification statusNot Qualified
Maximum seat height1.75 mm
minimum slew rate5 V/us
Nominal slew rate10 V/us
Maximum slew rate0.35 mA
Supply voltage upper limit19 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyBIPOLAR
Temperature levelINDUSTRIAL
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Nominal Uniform Gain Bandwidth5800 kHz
Minimum voltage gain500
broadbandNO
width3.9 mm

TLE2161IDG4 Related Products

TLE2161IDG4 TLE2161IDR TLE2161IDRG4 TLE2161CDG4
Description JFET-Input High-Output-Drive Low-Power Decompensated Operational Amplifier 8-SOIC JFET-Input High-Output-Drive Low-Power Decompensated Operational Amplifier 8-SOIC JFET-Input High-Output-Drive Low-Power Decompensated Operational Amplifier 8-SOIC JFET-Input High-Output-Drive Low-Power Decompensated Operational Amplifier 8-SOIC 0 to 70
Brand Name Texas Instruments Texas Instruments Texas Instruments Texas Instruments
Is it Rohs certified? conform to conform to conform to conform to
Maker Texas Instruments Texas Instruments Texas Instruments Texas Instruments
Parts packaging code SOIC SOIC SOIC SOIC
package instruction SOP, SOP8,.25 SOP, SOP8,.25 SOP, SOP8,.25 SOP, SOP8,.25
Contacts 8 8 8 8
Reach Compliance Code compliant compliant compliant compliant
ECCN code EAR99 EAR99 EAR99 EAR99
Factory Lead Time 6 weeks 1 week 6 weeks 1 week
Amplifier type OPERATIONAL AMPLIFIER OPERATIONAL AMPLIFIER OPERATIONAL AMPLIFIER OPERATIONAL AMPLIFIER
Architecture VOLTAGE-FEEDBACK VOLTAGE-FEEDBACK VOLTAGE-FEEDBACK VOLTAGE-FEEDBACK
Maximum average bias current (IIB) 0.004 µA 0.005 µA 0.004 µA 0.002 µA
Nominal Common Mode Rejection Ratio 82 dB 65 dB 82 dB 82 dB
frequency compensation YES (AVCL>=5) YES (AVCL>=5) YES (AVCL>=5) YES (AVCL>=5)
Maximum input offset voltage 4400 µV 4300 µV 4400 µV 4000 µV
JESD-30 code R-PDSO-G8 R-PDSO-G8 R-PDSO-G8 R-PDSO-G8
JESD-609 code e4 e4 e4 e4
length 4.9 mm 4.9 mm 4.9 mm 4.9 mm
low-bias YES YES YES YES
low-dissonance NO NO NO NO
micropower YES YES YES YES
Humidity sensitivity level 1 1 1 1
Negative supply voltage upper limit -19 V -19 V -19 V -19 V
Nominal Negative Supply Voltage (Vsup) -5 V -15 V -5 V -5 V
Number of functions 1 1 1 1
Number of terminals 8 8 8 8
Maximum operating temperature 85 °C 85 °C 85 °C 70 °C
Minimum operating temperature -40 °C -40 °C -40 °C -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP SOP SOP
Encapsulate equivalent code SOP8,.25 SOP8,.25 SOP8,.25 SOP8,.25
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE
method of packing TUBE TR TR TUBE
Peak Reflow Temperature (Celsius) 260 260 260 260
power supply +-3.5/+-18/7/36 V +-3.5/+-18/7/36 V +-3.5/+-18/7/36 V +-3.5/+-18/7/36 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.75 mm 1.75 mm 1.75 mm 1.75 mm
minimum slew rate 5 V/us 5 V/us 5 V/us 5 V/us
Nominal slew rate 10 V/us 10 V/us 10 V/us 10 V/us
Maximum slew rate 0.35 mA 0.35 mA 0.35 mA 0.375 mA
Supply voltage upper limit 19 V 19 V 19 V 19 V
Nominal supply voltage (Vsup) 5 V 15 V 5 V 5 V
surface mount YES YES YES YES
technology BIPOLAR BIPOLAR BIPOLAR BIPOLAR
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL COMMERCIAL
Terminal surface Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form GULL WING GULL WING GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm 1.27 mm 1.27 mm
Terminal location DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Nominal Uniform Gain Bandwidth 5800 kHz 5600 kHz 5800 kHz 5800 kHz
Minimum voltage gain 500 500 500 250
width 3.9 mm 3.9 mm 3.9 mm 3.9 mm
Is it lead-free? Lead free Lead free Lead free -
Maximum bias current (IIB) at 25C 0.000003 µA 0.000003 µA 0.000003 µA -
Minimum Common Mode Rejection Ratio 65 dB 65 dB 65 dB -
Maximum input offset current (IIO) 0.002 µA 0.002 µA 0.002 µA -
power NO NO NO -
Programmable power NO NO NO -
broadband NO NO NO -
Switching power supply PCB layout considerations
Correct switching power supply PCB layout becomes very important. In many cases, a power supply that is designed perfectly on paper may not work properly during the first commissioning because there a...
okhxyyo Power technology
The most complete power supply circuit diagram
A diagram that uses circuit component symbols to represent circuit connections is called a circuit diagram. A circuit diagram is a schematic layout diagram that uses physical electrical standardized s...
木犯001号 Power technology
DSP external device connection interface EMIF
The external device connection interface includes the external memory connection interface (EMIF), the host interface (HPI), etc. The external memory interface is mainly used to connect with parallel ...
Jacktang DSP and ARM Processors
How to understand the relationship between time window and RBW in FFT
As a commonly used spectrum analysis tool, Fast Fourier Transform (FFT) realizes the conversion from time domain to frequency domain and is one of the most commonly used basic functions in digital sig...
btty038 RF/Wirelessly
Retro light bulb wicks, Edison LED wick samples have arrived
In fact, it is an LED light strip, which is made into various specifications by connecting in series and parallel, and the surface is covered with yellow fluorescent powder....
眼大5子 Talking
Find a domestic single-chip microcomputer
[i=s] This post was last edited by feifeizhuer on 2019-4-10 17:29 [/i] The package is TSSOP16, 5 pins for VDD, 6 pins for ground, 15 and 16 pins should have comparator function; it should be 8-bit. I ...
feifeizhuer Domestic Chip Exchange

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号