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CY7C964A-ASC

Description
bus interface logic circuit
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size146KB,6 Pages
ManufacturerCypress Semiconductor
Download Datasheet Parametric View All

CY7C964A-ASC Overview

bus interface logic circuit

CY7C964A-ASC Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerCypress Semiconductor
Parts packaging codeQFP
package instructionLFQFP,
Contacts64
Reach Compliance Codeunknown
Factory Lead Time1 week
Address bus width8
External data bus width8
JESD-30 codeS-PQFP-G64
JESD-609 codee0
length10 mm
Humidity sensitivity level3
Number of terminals64
Package body materialPLASTIC/EPOXY
encapsulated codeLFQFP
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)240
Certification statusNot Qualified
Maximum seat height1.6 mm
surface mountYES
technologyCMOS
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width10 mm
uPs/uCs/peripheral integrated circuit typeBUS CONTROLLER, VME
Base Number Matches1
PRELIMINARY
CY7C964A
Bus Interface Logic Circuit
Features
• Comparators, counters, latches, and drivers minimize
logic requirements for a variety of multiplexed and
non-multiplexed buses
• Directly drives VMEbus address and data signals
• 8-bit comparator for slave address decoding
• Flexible interface optimized for VMEbus applications
• Companion device to Cypress VMEbus family of com-
ponents
• Replaces multiple SSI/MSI components
• Cascadable
• 64-pin QFP
• See the
VMEbus Interface Handbook
for more informa-
tion
case, the controllers provide the control and timing signals to
the Bus Interface Logic Circuit as it acts as a bridge between
the VMEbus and the Local bus.
Application with VMEbus Architecture
Use with Cypress VMEbus Controllers
The CY7C964A Bus Interface Logic Circuit is a seamless in-
terface between the VIC068A/VIC64 and the VMEbus signals.
The device functions equally well in the established 32-bit
VMEbus arena and the new 64-bit VMEbus standard. The de-
vice contains three 8-bit counters to fulfill the functions of Block
counters, and DMA counters as implied by the D64 portion of
the VMEbus specification. It also contains the necessary mul-
tiplexing logic to allow the 64-bit-wide VMEbus path to be fun-
nelled to and from the 32-bit local bus. Control circuitry is in-
cluded to manage the switching of the 32-bit address bus
during normal (32-bit) operations, and during MBLT (64-bit)
operations. The on-chip drivers are capable of driving the
VMEbus directly (48 mA).
Use in Other VMEbus Controller Implementations
The CY7C964A circuitry is designed to be of use to designers
of VMEbus circuitry, including VSB (VME subsystem bus) and
designs not requiring the features of the Cypress VIC068A,
VIC64, and CY7C960A. The logic diagram includes gener-
al-purpose blocks of comparators, counters, and latches that
can be controlled using the flexible control interface to allow
many different options to be implemented. Although the device
is offered in a small 64-pin package, the use of multiplexed
input and output pins provides access to the many internal
functions, thus saving external circuitry.
Functional Description
The CY7C964A integrates several space-consuming functions
into one small package, freeing board space for the implemen-
tation of added-value board features. It contains counters,
comparators, latches, and drivers configured to be of value to
implementors of any backplane interface with address and
data buses, particularly VMEbus interfaces. The on-chip driv-
ers are suitable for driving the VMEbus directly. The
CY7C964A is ideal in applications where high-performance
and real estate are primary concerns.
Although having many applications, the Bus Interface Logic
Circuit is an ideal companion part to Cypress’s VMEbus family
of components, the VIC068A, VIC64, and the CY7C960A. It is
intended to drive the address and data buses, so three or four
of these small devices are needed per controller. In every
Pin Configuration
VCC
LA7
LD6
LA6
LD5
LA5
LD4
LA4
GND
LD3
LA3
LD2
LA2
LD1
LA1
VCC
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
PQFP/CQFP/TQFP
Top View
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
GND
LD7
LDS
FC1
STROBE*
MWB*
LCOUT*
GND
VCOMP*
VCOUT*
LADO
LADI
LEDI
LEDO
A7
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
GND
LD0
LA0
DENIN*
DENIN1*
LAEN
LCIN*
VCIN*
VCC
BLT*
D64
DENO*
ABEN*
D0
A0
GND
VCC
Cypress Semiconductor Corporation
Document #: 38-09001 Rev. *A
3901 North First Street
D7
A6
D6
A5
D5
A4
D4
GND
A3
D3
A2
D2
A1
D1
VCC
C964A-1
San Jose
CA 95134 • 408-943-2600
Revised June 12, 2001

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