ISM61-1266EO-50.000 datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> ISM61-1266EO-50.000

ISM61-1266EO-50.000: DescriptionHCMOS/TTL Output Clock Oscillator,; CategoryPassive components oscillator; File Size99KB，2 Pages; ManufacturerILSI; Websitehttp://www.ilsiamerica.com

Download Datasheet Parametric View All

ISM61-1266EO-50.000 Overview

HCMOS/TTL Output Clock Oscillator,

ISM61-1266EO-50.000 Parametric

Parameter Name	Attribute value
Objectid	1293624535
package instruction	SMD, 4 PIN
Reach Compliance Code	compliant
Other features	TR, 7 INCH
Frequency Adjustment - Mechanical	NO
frequency stability	10%
JESD-609 code	e2
Installation features	SURFACE MOUNT
Nominal operating frequency	50 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	HCMOS/TTL
Output load	10 TTL, 30 pF
physical size	13.4mm x 8.55mm x 4.7mm
Maximum supply voltage	1.89 V
Minimum supply voltage	1.71 V
Nominal supply voltage	1.8 V
surface mount	YES
maximum symmetry	40/60 %
Terminal surface	TIN COPPER/TIN SILVER

Preview

Download Datasheet

View All

9 mm x 14 mm Plastic Package SMD Oscillator, TTL / HC-MOS

ISM61 Series

Product Features:

Low Jitter, Non-PLL Based Output

CMOS/TTL Compatible Logic Levels

Compatible with Leadfree Processing

Applications:

Fibre Channel

Server & Storage

Sonet /SDH

802.11 / Wifi

T1/E1, T3/E3

System Clock

Frequency

Output Level

HC-MOS

TTL

Duty Cycle

Rise / Fall Time

Output Load

Frequency Stability

Start-up Time

Enable / Disable

Time

Supply Voltage

Current

Operating

Storage

Jitter:

RMS(1sigma)

1 MHz-75 MHz

76 MHz-150 MHz

Max Integrated

1 MHz-75 MHz

76 MHz-150 MHz

Max Total Jitter

1 MHz-75 MHz

76 MHz-150 MHz

250 KHz to 150.000 MHz

‘0’ = 0.1 Vcc Max., ‘1’ = 0.9 Vcc Min.

‘0’ = 0.4 VDC Max., ‘1’ = 2.4 VDC Min.

Specify 50% ±10% or ±5% See Table in Part Number Guide

5 nS Max. @ Vcc = +3.3 VDC, 10 nS Max. @ Vcc = +5 VDC ***

Fo < 50 MHz = 10 TTL, Fo > 50 MHz = 5 LSTTL See Table in Part Number

Guide

See Frequency Stability Table (Includes room temperature tolerance and

stability over operating temperature)

10 mS Max.

100 nS Max. N.C. or

≥

70% Vdd = Enable.

≤

30% Vdd = Disable.

See Input Voltage Table, tolerance ±5 %

70 mA Max. ***

See Operating Temperature Table in Part Number Guide

-55



C to +125



5 pS RMS (1 sigma) Max. accumulated jitter (20K adjacent periods)

3 pS RMS (1 sigma) Max. accumulated jitter (20K adjacent periods)

1.5 pS RMS (1 sigma -12KHz to 20MHz)

1 pS RMS (1 sigma -12KHz to 20MHz)

50 pS p-p (100K adjacent periods)

30 pS p-p (100K adjacent periods)

Part Number Guide

Package

Input

Voltage

5 = 5.0 V

ISM61 -

3 = 3.3 V

7 = 3.0 V

2 = 2.7 V

6 = 2.5 V

1 = 1.8 V*

Sample Part Number:

Operating

Temperature

1 = 0 C to +70 C

6 = -10 C to +70 C

3 = -20 C to +70 C

4 = -30 C to +75 C

2 = -40 C to +85 C

ISM61 - 3251BH - 20.000

Output

1 = 10TTL / 15 pF HC-MOS

6 = 30 pF

5 = 50 pF HC-MOS (<40 MHz)

Symmetry

(Duty Cycle)

5 = 45 / 55 Max.

6 = 40 / 60 Max.

Stability

(in ppm)

**E =

10

**D =

15

**F =

20

**A =

25

B =

50

C =

100

Enable /

Disable

H = Enable

O = N/C

Frequency

- 20.000 MHz

NOTE: A 0.01 µF bypass capacitor is recommended between Vcc (pin 4) and GND (pin 2) to minimize power supply noise.

* Not available at all frequencies. ** Not available for all temperature ranges. *** Frequency, supply, and load related parameters.

ILSI

America

Phone: 775-851-8880 • Fax: 775-851-8882• e-mail: e-mail@ilsiamerica.com • www.ilsiamerica.com

5/22/12_B

Specifications subject to change without notice

Page 1

Recommended Resources

How to distinguish true and false chips

±5V regulated power supply circuit

Gantry planer main drive system electrical control circuit

Piezoelectric crystal voice controlled light

KTYL81-210 temperature sensor is used in A/D converter temperature compensation circuit

Programmable digital low-pass filter

Some Misunderstandings of FPGA Learning: Some Misunderstandings of FPGA Learning...; zxopenljx EE_FPGA Learning Park

Automatic phase and frequency shifting circuit diagram in karaoke, collection required: Automatic phase and frequency shifting circuit diagram in Karaoke...; marvyyang Circuit Observation Room

Today's broadcast starts at 10:00: The development and latest applications of sensors in industrial motors: Live broadcast time: Today (Friday) 10:00-11:30 Live Topic: The Development and Latest Application of Sensors in Industrial Motors Live Broadcast Introduction: How much impact will the aging of the st...; EEWORLD社区 Sensor

Playing with Zynq Serial 4 - Introduction to AXI Bus Protocol 2: 2 Signal Description 2.1 Global Signals Table 2-1 Global signalsSignalsourcedescribeACLKClock SourceGlobal clock signal. All signals are sampled on the rising edge of the global clock.ARESETnReset Sou...; ove学习使我快乐 FPGA/CPLD

Death happens every day, what should we do?: On the evening of July 3, Liu Yunfang, a female worker at Fujian Changlong Textile Factory in Mawei, Fuzhou, fainted in the workshop and died the next day after failed rescue efforts. The doctor said ...; gaoyanmei Talking

C6678 Multi-core DSP Software Development Difficulties and Solutions: C6678 multi-core DSP, more complicated to useComplex octa-core DSP (CorePAC core manual is 250 pages!) Complex DSP peripherals (RapidIO, Ethernet, CDMA, thousands of pages of hardware manuals!) Dizzy ...; Jacktang Microcontroller MCU

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components